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Prasun Ghosal
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2020 – today
- 2024
- [c63]Tamonash Bhattacharyya, Prasun Ghosal, Sonam
, Sujay Deb:
Vigil: A RISC-V SoC Architecture for 2-fold Hybrid CNN-kNN based Fall Detector Implementation on FPGA. VLSID 2024: 372-377 - 2023
- [c62]Rishabh Mondal
, Prasun Ghosal
:
Recall-Driven Precision Refinement: Unveiling Accurate Fall Detection Using LSTM. IFIPIoT (2) 2023: 74-83 - [c61]Tamonash Bhattacharyya, Prasun Ghosal:
A Fall Detection System using Hybrid Inertial and Physiological Signal Classifiers for Dynamic Environments. iSES 2023: 51-56 - [i4]Rishabh Mondal, Prasun Ghosal:
Recall-driven Precision Refinement: Unveiling Accurate Fall Detection using LSTM. CoRR abs/2309.07154 (2023) - 2022
- [c60]Munshi Mostafijur Rahaman, Prasun Ghosal, Chandan Giri:
WiZ-BMS: A Hybrid Wireless Network-on-Chip Design with Fully Adaptive Routing. iSES 2022: 242-247 - 2021
- [j12]Suraj Paul, Navonil Chatterjee, Prasun Ghosal:
Dynamic task allocation and scheduling with contention-awareness for Network-on-Chip based multicore systems. J. Syst. Archit. 115: 102020 (2021) - [j11]Tuhin Subhra Das, Prasun Ghosal, Navonil Chatterjee:
VCS: A method of in-order packet delivery for adaptive NoC routing. Nano Commun. Networks 28: 100333 (2021) - [j10]Suraj Paul, Navonil Chatterjee, Prasun Ghosal
, Jean-Philippe Diguet:
Adaptive Task Allocation and Scheduling on NoC-based Multicore Platforms with Multitasking Processors. ACM Trans. Embed. Comput. Syst. 20(1): 4:1-4:26 (2021) - [c59]Suraj Paul, Navonil Chatterjee, Prasun Ghosal, Jean-Philippe Diguet:
A Hybrid Adaptive Strategy for Task Allocation and Scheduling for Multi-applications on NoC-based Multicore Systems with Resource Sharing. DATE 2021: 1663-1666 - [c58]Avik Bose, Prasun Ghosal:
A scalable NoC topology targeting network performance. NoCArc@MICRO 2021: 4-9 - [c57]Pratima Chatterjee, Prasun Ghosal:
Introducing Parallelism in Ribosomal Computing: A Feasibility Study and Analysis. NANOCOM 2021: 32:1-32:5 - [c56]Avik Bose, Prasun Ghosal:
Dynamic application mapping on CTH network: a performance-centric approach. SenSys 2021: 616-622 - 2020
- [j9]Avik Bose
, Prasun Ghosal:
A low latency energy efficient BFT based 3D NoC design with zone based routing strategy. J. Syst. Archit. 108: 101738 (2020) - [j8]Tuhin Subhra Das, Prasun Ghosal, Navonil Chatterjee, Arnab Nath, Akash Banerjee, Subhojyoti Khastagir:
Application of Logical Sub-networking in Congestion-aware Deadlock-free SDmesh Routing. ACM Trans. Embed. Comput. Syst. 19(4): 24:1-24:26 (2020) - [c55]Tuhin Subhra Das, Navonil Chatterjee, Prasun Ghosal:
Regulating Degree of Adaptiveness for Performance-Centric NoC Routing. ISVLSI 2020: 542-547 - [c54]Avik Bose, Prasun Ghosal:
Switching at flit level: A Congestion Efficient Flow Control Strategy for Network-on-Chip. PDP 2020: 319-322 - [c53]Avik Bose, Prasun Ghosal:
A cube-tree hybrid NoC topology with 3D mirroring technique for load balancing. NanoCoCoA@SenSys 2020: 26-32
2010 – 2019
- 2019
- [j7]Munshi Mostafijur Rahaman
, Prasun Ghosal
, Tuhin Subhra Das:
Latency, Throughput and Power Aware Adaptive NoC Routing on Orthogonal Convex Faulty Region. J. Circuits Syst. Comput. 28(4): 1950055:1-1950055:21 (2019) - [j6]Suraj Paul, Navonil Chatterjee, Prasun Ghosal
:
A permanent fault tolerant dynamic task allocation approach for Network-on-Chip based multicore systems. J. Syst. Archit. 97: 287-303 (2019) - [j5]Suraj Paul, Navonil Chatterjee, Prasun Ghosal:
Dynamic Task Mapping and Scheduling with Temperature-Awareness on Network-on-Chip based Multicore Systems. J. Syst. Archit. 98: 271-288 (2019) - [c52]Tuhin Subhra Das, Prasun Ghosal, Navonil Chatterjee:
Virtual circuit switch based orderly delivery of packets in adaptive NoC routing. NoCArc@MICRO 2019: 11:1-11:6 - [c51]Tuhin Subhra Das, Prasun Ghosal, Arnab Nath:
Addressing Out-of-order Issue of Congestion-aware Adaptive Routing in Subnet based NoC. TENCON 2019: 1584-1589 - 2018
- [c50]Neel Kamal, Prasun Ghosal:
Three Tier Architecture for IoT Driven Health Monitoring System Using Raspberry Pi. iSES 2018: 167-170 - [c49]Subha Koley, Saket Srivastava
, Prasun Ghosal:
Correlating Fatality Rate to Road Accidents in India: A Case Study Using Big Data. iSES 2018: 171-176 - [c48]Suraj Paul, Navonil Chatterjee, Prasun Ghosal:
A Dynamic Resource Allocation Strategy for NoC Based Multicore Systems with Permanent Faults. ISVLSI 2018: 287-292 - [c47]Pratima Chatterjee, Prasun Ghosal:
Power Analysis of an mRNA-Ribosome System. NANOARCH 2018: 141-146 - 2017
- [j4]Saraju P. Mohanty, Ashok Srivastava, Shiyan Hu, Prasun Ghosal:
Guest editorial - Special issue on hardware assisted techniques for IoT and bigdata applications. Integr. 58: 263-266 (2017) - [j3]Mayukh Sarkar
, Prasun Ghosal, Saraju P. Mohanty:
Minimal reversible circuit synthesis on a DNA computer. Nat. Comput. 16(3): 463-472 (2017) - [c46]Pratima Chatterjee, Prasun Ghosal:
Realizing All Logic Operations Using mRNA-Ribosome System as a Post Si Alternative. iNIS 2017: 40-45 - [c45]Tuhin Subhra Das, Prasun Ghosal:
MSM: Performance Enhancing Area and Congestion Aware Network-on-Chip Architecture. iNIS 2017: 257-262 - [c44]Mayukh Sarkar
, Prasun Ghosal:
Performing Mathematics Using DNA: Complex Number Arithmetic Using Sticker Model. ISVLSI 2017: 568-573 - [c43]Subha Koley, Prasun Ghosal:
An IoT Enabled Real-Time Communication and Location Tracking System for Vehicular Emergency. ISVLSI 2017: 671-676 - 2016
- [j2]Soumyajit Poddar
, Prasun Ghosal, Hafizur Rahaman
:
Design of a High-Performance CDMA-Based Broadcast-Free Photonic Multi-Core Network on Chip. ACM Trans. Embed. Comput. Syst. 15(1): 2:1-2:30 (2016) - [c42]Munshi Mostafijur Rahaman
, Prasun Ghosal, Siddhartha Biswas:
A Scalable Hierarchical Ring Based Wireless Network-on-Chip. ICIT 2016: 154-159 - [c41]Mayukh Sarkar
, Prasun Ghosal:
Post CMOS Computing Beyond Si: DNA Computer as Future Alternative. iNIS 2016: 129-133 - [c40]Swapan Shakhari
, Prasun Ghosal, Mayukh Sarkar
:
A Provably Good Method to Generate Good DNA Sequences. iNIS 2016: 134-138 - [c39]Pratima Chatterjee, Mayukh Sarkar
, Prasun Ghosal:
Computing in Ribosomes: Implementing Sequential Circuits Using mRNA-Ribosome System. iNIS 2016: 230-235 - [c38]Mayukh Sarkar
, Prasun Ghosal:
Mathematics Using DNA: Performing GCD and LCM on a DNA Computer. iNIS 2016: 240-243 - [c37]Pratima Chatterjee, Mayukh Sarkar
, Prasun Ghosal:
Computing in Ribosomes: Performing Boolean Logic Using mRNA-Ribosome System. ISVLSI 2016: 260-265 - [c36]Avik Bose
, Prasun Ghosal, Saraju P. Mohanty:
STA: A Highly Scalable Low Latency Butterfly Fat Tree Based 3D NoC Design. ISVLSI 2016: 496-501 - 2015
- [j1]Debashri Roy, Prasun Ghosal, Saraju P. Mohanty:
FuzzRoute: A Thermally Efficient Congestion-Free Global Routing Method for Three-Dimensional Integrated Circuits. ACM Trans. Design Autom. Electr. Syst. 21(1): 1:1-1:38 (2015) - [c35]Soumyajit Poddar
, Prasun Ghosal:
Multicore ICs: Recent Trends in Developing Methodologies and Frameworks for Simulation. iNIS 2015: 53-56 - [c34]Prasun Ghosal, Saraju P. Mohanty:
Power Minimization of a Memristor-Based Wien Bridge Oscillator through a Simscape Framework. iNIS 2015: 83-88 - [c33]Roshni Chakraborty, Prasun Ghosal:
Generalized Optimum Reversible Circuit Synthesis: A Memetic Approach. iNIS 2015: 175-180 - [c32]Mayukh Sarkar
, Prasun Ghosal:
Implementing Data Structure Using DNA: An Alternative in Post CMOS Computing. ISVLSI 2015: 345-349 - [c31]Soumyajit Poddar
, Prasun Ghosal, Hafizur Rahaman
:
Adaptive CDMA based multicast method for photonic networks on chip. SoCC 2015: 298-303 - [c30]Subha Koley, Prasun Ghosal:
Addressing Hardware Security Challenges in Internet of Things: Recent Trends and Possible Solutions. UIC/ATC/ScalCom 2015: 517-520 - [c29]Souvik Chowdhury, Prasun Ghosal:
Enterprise Application Security in Android Devices Using Short Messaging Service under Unified Communication Framework. UIC/ATC/ScalCom 2015: 694-697 - 2014
- [c28]Dhiman Ghosh, Prasun Ghosal, Saraju P. Mohanty:
A Highly Parameterizable Simulator for Performance Analysis of NoC Architectures. ICIT 2014: 311-315 - [c27]Tuhin Subhra Das, Prasun Ghosal, Saraju P. Mohanty, Elias Kougianos:
A performance enhancing hybrid locally mesh globally star NoC topology. ACM Great Lakes Symposium on VLSI 2014: 69-70 - [c26]Debashri Roy, Prasun Ghosal, Saraju P. Mohanty:
FuzzRoute: A Method for Thermally Efficient Congestion Free Global Routing in 3D ICs. ISVLSI 2014: 71-76 - [c25]Somrita Ghosh, Prasun Ghosal, Nabanita Das, Saraju P. Mohanty, Oghenekarho Okobiah:
Data Correlation Aware Serial Encoding for Low Switching Power On-Chip Communication. ISVLSI 2014: 124-129 - [c24]Avik Bose
, Prasun Ghosal, Saraju P. Mohanty:
A Low Latency Scalable 3D NoC Using BFT Topology with Table Based Uniform Routing. ISVLSI 2014: 136-141 - [c23]Manodipan Sahoo
, Prasun Ghosal, Hafizur Rahaman
:
An ABCD Parameter Based Modeling and Analysis of Crosstalk Induced Effects in Multiwalled Carbon Nanotube Bundle Interconnects. VLSID 2014: 433-438 - 2013
- [c22]Debashri Roy, Prasun Ghosal:
A fuzzified approach towards global routing in VLSI layout design. FUZZ-IEEE 2013: 1-8 - [c21]Soumyajit Poddar
, Prasun Ghosal, Priyajit Mukherjee, Suman Samui
, Hafizur Rahaman
:
An Area and Power Efficient Dynamic TDMA Based Photonic Network on Chip. ISED 2013: 113-117 - [c20]Mayukh Sarkar
, Prasun Ghosal, Saraju P. Mohanty:
Reversible circuit synthesis using ACO and SA based Quine-McCluskey method. MWSCAS 2013: 416-419 - 2012
- [c19]Prasun Ghosal, Satrajit Das, Arindam Das:
A Novel Algorithm for Obstacle Aware RMST Construction during Routing in 3D ICs. ACITY (2) 2012: 649-658 - [c18]Prasun Ghosal, Arindam Das, Satrajit Das:
Obstacle Aware RMST Generation Using Non-Manhattan Routing for 3D ICs. ACITY (3) 2012: 657-666 - [c17]Prasun Ghosal, Tuhin Subhra Das:
A Novel Routing Algorithm for On-Chip Communication in NoC on Diametrical 2D Mesh Interconnection Architecture. ACITY (3) 2012: 667-676 - [c16]Prasun Ghosal, Satrajit Das, Arindam Das:
A New Class of Obstacle Aware Steiner Routing in 3D Integrated Circuits. ACITY (3) 2012: 697-706 - [c15]Prasun Ghosal, Arijit Chakraborty, Sabyasachee Banerjee
:
Honey Bee Based Vehicular Traffic Optimization and Management. BIC-TA (2) 2012: 455-463 - [c14]Prasun Ghosal, Sunita Choudhuri, Hafizur Rahaman
:
Diametric Mesh of Tree (DiaMoT) Routing Framework for High Performance NoCs: A Hierarchical Approach. HPCC-ICESS 2012: 532-537 - [c13]Prasun Ghosal, Tuhin Subhra Das:
SD2D: A Novel Routing Architecture for Network-on-Chip. ISED 2012: 221-225 - [c12]Manodipan Sahoo
, Prasun Ghosal, Hafizur Rahaman
:
Efficient and Compact Electrical Modeling of Multi Walled Carbon Nanotube Interconnects. ISED 2012: 236-240 - [c11]Soumyajit Poddar
, Prasun Ghosal, Priyajit Mukherjee, Suman Samui
, Hafizur Rahaman
:
Design of an NoC with on-chip photonic interconnects using adaptive CDMA links. SoCC 2012: 352-357 - [c10]Soumyajit Poddar
, Prasun Ghosal, Priyajit Mukherjee, Suman Samui
, Hafizur Rahaman
:
A Photonic Network on Chip with CDMA Links. VDAT 2012: 377-378 - [c9]Prasun Ghosal, Tuhin Subhra Das:
Routing in NoC on Diametrical 2D Mesh Architecture. VDAT 2012: 381-382 - [i3]Prasun Ghosal, Arijit Chakraborty, Sabyasachee Banerjee, Satabdi Barman:
Speed Optimization In Unplanned Traffic Using Bio-Inspired Computing And Population Knowledge Base. CoRR abs/1212.2866 (2012) - [i2]Prasun Ghosal, Sankar Karmakar:
Diametrical Mesh Of Tree (D2D-MoT) Architecture: A Novel Routing Solution For NoC. CoRR abs/1212.2874 (2012) - 2011
- [c8]Prasun Ghosal, Hafizur Rahaman
, Satrajit Das, Arindam Das, Parthasarathi Dasgupta:
Obstacle Aware Routing in 3D Integrated Circuits. ADCONS 2011: 451-460 - 2010
- [c7]Prasun Ghosal, Hafizur Rahaman
, Parthasarathi Dasgupta:
Minimizing Thermal Disparities during Placement in 3D ICs. CSE 2010: 160-167 - [i1]Prasun Ghosal, Malabika Biswas, Manish Biswas:
Hardware Implementation of TDES Crypto System with On Chip Verification in FPGA. CoRR abs/1002.4836 (2010)
2000 – 2009
- 2009
- [c6]Tuhina Samanta, Hafizur Rahaman
, Prasun Ghosal, Parthasarathi Dasgupta:
A Method for the Multi-Net Multi-Pin Routing Problem with Layer Assignment. VLSI Design 2009: 387-392 - 2008
- [c5]Prasun Ghosal, Tuhina Samanta, Hafizur Rahaman
, Parthasarathi Dasgupta:
Thermal-Aware Placement of Standard Cells and Gate Arrays: Studies and Observations. ISVLSI 2008: 369-374 - [c4]Tuhina Samanta, Prasun Ghosal, Hafizur Rahaman
, Parthasarathi Dasgupta:
Revisiting fidelity: a case of elmore-based Y-routing trees. SLIP 2008: 27-34 - 2007
- [c3]Tuhina Samanta, Prasun Ghosal, Hafizur Rahaman
, Parthasarathi Dasgupta:
Minimum-Congestion Placement for Y-interconnects: Some studies and observations. ISVLSI 2007: 73-80 - 2006
- [c2]Tuhina Samanta, Prasun Ghosal, Hafizur Rahaman, Parthasarathi Dasgupta:
A heuristic method for constructing hexagonal Steiner minimal trees for routing in VLSI. ISCAS 2006 - 2005
- [c1]Prasun Ghosal, Tuhina Samanta, Hafizur Rahaman, Parthasarathi Dasgupta:
Recent Trends in the Application of Meta-Heuristics to VLSI Layout Design. IICAI 2005: 232-251
Coauthor Index
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last updated on 2024-08-05 21:13 CEST by the dblp team
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