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2020 – today
- 2022
[c13]Navonil Chatterjee, Marcelo Ruaro, Kevin J. M. Martin, Jean-Philippe Diguet:
Mitigating Transceiver and Token Controller Permanent Faults in Wireless Network-on-Chip. PDP 2022: 238-245- 2021
- [j12]Suraj Paul, Navonil Chatterjee, Prasun Ghosal:
Dynamic task allocation and scheduling with contention-awareness for Network-on-Chip based multicore systems. J. Syst. Archit. 115: 102020 (2021) - [j11]Tuhin Subhra Das, Prasun Ghosal, Navonil Chatterjee:
VCS: A method of in-order packet delivery for adaptive NoC routing. Nano Commun. Networks 28: 100333 (2021) - [j10]Suraj Paul, Navonil Chatterjee, Prasun Ghosal
, Jean-Philippe Diguet:
Adaptive Task Allocation and Scheduling on NoC-based Multicore Platforms with Multitasking Processors. ACM Trans. Embed. Comput. Syst. 20(1): 4:1-4:26 (2021) - [j9]Arnab Kumar Biswas, Navonil Chatterjee, Hemanta Kumar Mondal, Guy Gogniat, Jean-Philippe Diguet:
Attacks Toward Wireless Network-on-Chip and Countermeasures. IEEE Trans. Emerg. Top. Comput. 9(2): 692-706 (2021) - [c12]Suraj Paul, Navonil Chatterjee, Prasun Ghosal, Jean-Philippe Diguet:
A Hybrid Adaptive Strategy for Task Allocation and Scheduling for Multi-applications on NoC-based Multicore Systems with Resource Sharing. DATE 2021: 1663-1666 - 2020
- [j8]Priyajit Mukherjee, Navonil Chatterjee, Santanu Chattopadhyay:
Thermal-aware detour routing in 3D NoCs. J. Parallel Distributed Comput. 144: 230-245 (2020) - [j7]Tuhin Subhra Das, Prasun Ghosal, Navonil Chatterjee, Arnab Nath, Akash Banerjee, Subhojyoti Khastagir:
Application of Logical Sub-networking in Congestion-aware Deadlock-free SDmesh Routing. ACM Trans. Embed. Comput. Syst. 19(4): 24:1-24:26 (2020) - [c11]Hemanta Kumar Mondal, Navonil Chatterjee, Rodrigo Cataldo, Jean-Philippe Diguet:
Broadcast Mechanism Based on Hybrid Wireless/Wired NoC for Efficient Barrier Synchronization in Parallel Computing. ASP-DAC 2020: 265-270 - [c10]Tuhin Subhra Das, Navonil Chatterjee, Prasun Ghosal:
Regulating Degree of Adaptiveness for Performance-Centric NoC Routing. ISVLSI 2020: 542-547
2010 – 2019
- 2019
- [j6]Suraj Paul, Navonil Chatterjee, Prasun Ghosal:
A permanent fault tolerant dynamic task allocation approach for Network-on-Chip based multicore systems. J. Syst. Archit. 97: 287-303 (2019) - [j5]Suraj Paul, Navonil Chatterjee, Prasun Ghosal:
Dynamic Task Mapping and Scheduling with Temperature-Awareness on Network-on-Chip based Multicore Systems. J. Syst. Archit. 98: 271-288 (2019) - [c9]Tuhin Subhra Das, Prasun Ghosal, Navonil Chatterjee:
Virtual circuit switch based orderly delivery of packets in adaptive NoC routing. NoCArc@MICRO 2019: 11:1-11:6 - [c8]Navonil Chatterjee, Hemanta Kumar Mondal, Rodrigo Cataldo, Jean-Philippe Diguet:
CDMA-based multiple multicast communications on WiNOC for efficient parallel computing. NOCS 2019: 19:1-19:2 - [i1]N. Prasad, Navonil Chatterjee, Santanu Chattopadhyay, Indrajit Chakrabarti:
Runtime Mitigation of Packet Drop Attacks in Fault-tolerant Networks-on-Chip. CoRR abs/1908.00289 (2019) - 2018
- [j4]Navonil Chatterjee, Priyajit Mukherjee, Santanu Chattopadhyay:
Reliability-aware application mapping onto mesh based Network-on-Chip. Integr. 62: 92-113 (2018) - [j3]Navonil Chatterjee, Suraj Paul, Santanu Chattopadhyay:
Task mapping and scheduling for network-on-chip based multi-core platform with transient faults. J. Syst. Archit. 83: 34-56 (2018) - [c7]Suraj Paul, Navonil Chatterjee, Prasun Ghosal:
A Dynamic Resource Allocation Strategy for NoC Based Multicore Systems with Permanent Faults. ISVLSI 2018: 287-292 - 2017
- [j2]Navonil Chatterjee, Suraj Paul, Priyajit Mukherjee, Santanu Chattopadhyay:
Deadline and energy aware dynamic task mapping and scheduling for Network-on-Chip based multi-core platform. J. Syst. Archit. 74: 61-77 (2017) - [j1]Navonil Chatterjee, Suraj Paul, Santanu Chattopadhyay:
Fault-Tolerant Dynamic Task Mapping and Scheduling for Network-on-Chip-Based Multicore Platform. ACM Trans. Embed. Comput. Syst. 16(4): 108:1-108:24 (2017) - 2016
- [c6]Navonil Chatterjee, Sheshivardhan Reddy, Shilpa Reddy, Santanu Chattopadhyay:
A reliability aware application mapping onto mesh based Network-on-Chip. RAIT 2016: 537-542 - [c5]Navonil Chatterjee, Priyajit Mukherjee, Santanu Chattopadhyay:
A strategy for fault tolerant reconfigurable Network-on-Chip design. VDAT 2016: 1-2 - 2015
- [c4]Navonil Chatterjee, Santanu Chattopadhyay:
Fault tolerant mesh based Network-on-Chip architecture. ISCAS 2015: 417-420 - 2014
- [c3]Navonil Chatterjee, Santanu Chattopadhyay, Kanchan Manna:
A spare router based reliable Network-on-Chip design. ISCAS 2014: 1957-1960 - [c2]Navonil Chatterjee, N. Prasad, Santanu Chattopadhyay:
A spare link based reliable Network-on-Chip design. VDAT 2014: 1-6 - 2012
- [c1]Sudip Ghosh, Somsubhra Talapatra, Debasish Mondal, Navonil Chatterjee, Hafizur Rahaman, Santi P. Maity:
VLSI Architecture for Spatial Domain Spread Spectrum Image Watermarking Using Gray-Scale Watermark. VDAT 2012: 375-376
Coauthor Index
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