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Masaru Fukushi
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2020 – today
- 2023
- [c45]Yota Kurokawa, Masaru Fukushi:
Performance Evaluation of Parallel Tasks for Fault-tolerant Routing Methods. ICCE-Taiwan 2023: 441-442 - [c44]Shoi Arata, Yota Kurokawa, Masaru Fukushi:
Accuracy improvement of stock price forecasting using Prophet. ICCE-Taiwan 2023: 487-488 - 2022
- [j18]Itsuo Takanami, Masaru Fukushi:
Degradable Self-restructuring of Processor Arrays by Direct Spare Replacement. Trans. Comput. Sci. 39: 1-21 (2022) - [c43]Yota Kurokawa, Masaru Fukushi:
Performance Evaluation of Fault-Tolerant Routing Methods Using Parallel Programs. ICCE-TW 2022: 111-112 - [c42]Taiki Tomita, Keiichi Inohara, Yota Kurokawa, Masaru Fukushi:
A Dynamic Reconfiguration Method of Communication Groups for Parallel Volunteer Computing. NaNA 2022: 506-510 - 2021
- [j17]Chan Gao
, Bin Yang
, Xiaohong Jiang
, Hiroshi Inamura
, Masaru Fukushi
:
Covert Communication in Relay-Assisted IoT Systems. IEEE Internet Things J. 8(8): 6313-6323 (2021) - [j16]Itsuo Takanami, Masaru Fukushi, Takahiro Watanabe:
Self-restructuring of Mesh-Connected Processor Arrays with Spares Assigned on Rotated Orthogonal Side. Trans. Comput. Sci. 38: 36-53 (2021) - [c41]Yota Kurokawa, Daiki Kajimoto, Masaru Fukushi:
A Development Support Tool for Fault-tolerant Routing Methods on Network-on-Chips. ICCE-TW 2021: 1-2 - [c40]Taiki Tomita, Yota Kurokawa, Masaru Fukushi:
A Fault-Tolerant Routing Method Using Bus Functions in Two-dimensional Torus Network-on-Chips. ICCE-TW 2021: 1-2 - [c39]Taiki Tomita, Yota Kurokawa, Masaru Fukushi:
A Fault-tolerant Routing Method for 2D-torus Network-on-Chips Based on Bus Functions. ISCIT 2021: 123-128 - 2020
- [j15]Masaru Fukushi, Toshihiro Katsuta, Yota Kurokawa:
A degradable NoC router for the improvement of fault-tolerant routing performance. Artif. Life Robotics 25(2): 301-307 (2020) - [c38]Yuto Watanabe, Masaru Fukushi:
A Parallel Volunteer Computing Based on Server Assisted Communications. CANDAR (Workshops) 2020: 242-247 - [c37]Akari Kawazoe, Yota Kurokawa, Masaru Fukushi:
A Fault-Tolerant Adaptive Routing Method Based on the Passage of Faulty Nodes. ICCE-TW 2020: 1-2
2010 – 2019
- 2019
- [j14]Yota Kurokawa, Masaru Fukushi:
Passage of Faulty Nodes: A Novel Approach for Fault-Tolerant Routing on NoCs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 102-A(12): 1702-1710 (2019) - [j13]Yota Kurokawa, Masaru Fukushi:
Design of an extended 2D mesh network-on-chip and development of A fault-tolerant routing method. IET Comput. Digit. Tech. 13(3): 224-232 (2019) - [j12]Itsuo Takanami, Masaru Fukushi:
A Built-In Circuit for Self-reconfiguring Mesh-Connected Processor Arrays with Spares on Diagonal. Trans. Comput. Sci. 34: 109-135 (2019) - [c36]Masaru Fukushi, Yuta Kanbara:
A GPU Implementation Method of Deep Neural Networks Based on Data Swapping. ICCE-TW 2019: 1-2 - [c35]Yota Kurokawa, Masaru Fukushi:
Performance Improvement of Region-Based Fault-Tolerant Routing Methods Based on the Passage of Fault Blocks. ICCE-TW 2019: 1-2 - 2018
- [c34]Tamotsu Kawamura, Masaru Fukushi, Yasushi Hirano, Yusuke Fujita, Yoshihiko Hamamoto:
A Network-Based Event Detection Module Using NTP for Cyber Attacks on IoT. CANDAR Workshops 2018: 86-91 - [c33]Yota Kurokawa, Masaru Fukushi:
XY Based Fault-Tolerant Routing with the Passage of Faulty Nodes. CANDAR Workshops 2018: 99-104 - [c32]Itsuo Takanami, Masaru Fukushi:
Degradable Restructuring of Mesh-Connected Processor Arrays with Spares on Orthogonal Sides. PRDC 2018: 11-14 - [c31]Itsuo Takanami, Masaru Fukushi:
Restructuring Mesh-Connected Processor Arrays with Spares on Four Sides by Orthogonal Side Rotation. PRDC 2018: 181-182 - 2017
- [c30]Itsuo Takanami, Masaru Fukushi:
A Built-in Circuit for Self-Repairing Mesh-Connected Processor Arrays with Spares on Diagonal. PRDC 2017: 110-117 - 2016
- [j11]Sakai Takeshi, Masaru Fukushi:
A Reliable Volunteer Computing System with Credibility-based Voting. J. Inf. Process. 24(2): 266-274 (2016) - [c29]Yoshiki Jojima, Masaru Fukushi:
A fault-tolerant routing method for 2D-mesh Network-on-Chips based on components of a router. GCCE 2016: 1-2 - [c28]Yohta Kurokawa, Masaru Fukushi:
A prototype router circuit for extended 2D mesh network on chips. GCCE 2016: 1-2 - 2015
- [j10]Yuto Miyakoshi, Shinya Yasuda, Kan Watanabe, Masaru Fukushi, Yasuyuki Nogami:
Dynamic Job Scheduling Method Based on Expected Probability of Completion of Voting in Volunteer Computing. IEICE Trans. Inf. Syst. 98-D(12): 2132-2140 (2015) - [c27]Kaworu Ochi, Masaru Fukushi:
A Group-Based Job Scheduling Method for Parallel Volunteer Computing. CANDAR 2015: 571-575 - [c26]Shun-ichiro Tani, Yasuyuki Nogami, Masaru Fukushi:
An implementation of credibility-based job scheduling method in volunteer computing systems. ICCE-TW 2015: 37-38 - [c25]Shoma Kajitani, Yasuyuki Nogami, Masaru Fukushi, Noriki Amano
:
A performance evaluation of Web-based volunteer computing using applications with GMP. ICCE-TW 2015: 41-42 - 2014
- [c24]Sakai Takeshi, Masaru Fukushi:
Implementation of a Reliable Volunteer Computing System with Credibility-Based Voting. CANDAR 2014: 354-359 - [c23]Yudai Tateishi, Masaru Fukushi, Toru Abe:
A Memory Efficient Parallel Method for Voxel-Based Multiview Stereo. CANDAR 2014: 367-372 - [c22]Yuto Miyakoshi, Kan Watanabe, Masaru Fukushi, Yasuyuki Nogami:
A Job Scheduling Method Based on Expected Probability of Completion of Voting in Volunteer Computing. CANDAR 2014: 399-405 - [c21]Makoto Kuhara, Noriki Amano
, Kan Watanabe, Yasuyuki Nogami, Masaru Fukushi:
A peer-to-peer communication function among Web browsers for Web-based Volunteer Computing. ISCIT 2014: 383-387 - [c20]Toshiya Doi, Masaru Fukushi, Kan Watanabe, Yasuyuki Nogami:
Implementation and evaluation of credibility-based voting for volunteer computing systems. ISCIT 2014: 388-392 - 2013
- [j9]Yusuke Fukushima, Masaru Fukushi, Ikuko Eguchi Yairi:
A Region-based Fault-Tolerant Routing Algorithmfor 2D Irregular Mesh Network-on-Chip. J. Electron. Test. 29(3): 415-429 (2013) - [c19]M. M. Hafizur Rahman
, Asadullah Shah
, Masaru Fukushi, Yasushi Inoguchi:
Hierarchical Tori Connected Mesh Network. ICCSA (5) 2013: 197-210 - [c18]Toru Abe, Masaru Fukushi, Daisuke Ueda:
Primitive Human Action Recognition Based on Partitioned Silhouette Block Matching. ISVC (2) 2013: 308-317 - [c17]Kan Watanabe, Nobuo Funabiki, Toru Nakanishi, Masaru Fukushi:
Optimal Spot-Checking for Delayed Attack on Desktop Grid Systems. UKSim 2013: 600-605 - 2012
- [c16]Masaru Fukushi, Naoki Sekiguchi, Toru Abe:
Parallelization of voxel based multiview stereo for arbitrarily configured viewpoints. ICIP 2012: 1701-1704 - 2011
- [j8]Kan Watanabe, Masaru Fukushi, Michitaka Kameyama:
Adaptive Group-Based Job Scheduling for High Performance and Reliable Volunteer Computing. J. Inf. Process. 19: 39-51 (2011) - [c15]Hiroshi Kutami, Yusuke Fukushima, Masaru Fukushi, Ikuko Eguchi Yairi, Takeshi Hattori:
Route-Aware Task Mapping Method for Fault-Tolerant 2D-Mesh Network-on-Chips. DFT 2011: 472-480 - 2010
- [j7]Kan Watanabe, Masaru Fukushi, Susumu Horiguchi:
Expected-Credibility-Based Job Scheduling for Reliable Volunteer Computing. IEICE Trans. Inf. Syst. 93-D(2): 306-314 (2010) - [j6]Kan Watanabe, Masaru Fukushi:
Generalized Spot-Checking for Reliable Volunteer Computing. IEICE Trans. Inf. Syst. 93-D(12): 3164-3172 (2010) - [c14]Kan Watanabe, Masaru Fukushi:
Generalized Spot-Checking for Sabotage-Tolerance in Volunteer Computing Systems. CCGRID 2010: 655-660 - [c13]Yusuke Fukushima, Masaru Fukushi, Ikuko Eguchi Yairi, Takeshi Hattori:
A Hardware-Oriented Fault-Tolerant Routing Algorithm for Irregular 2D-Mesh Network-on-Chip without Virtual Channels. DFT 2010: 52-59 - [c12]Naoki Sekiguchi, Masaru Fukushi, Toru Abe, Tetsuo Kinoshita
:
A parallelization method for multi-stereo 3D shape reconstruction. ICIP 2010: 4493-4496
2000 – 2009
- 2009
- [j5]Masaru Fukushi, Susumu Horiguchi, Luke Demoracski, Fabrizio Lombardi:
An Efficient Framework for Scalable Defect Isolation in Large Scale Networks of DNA Self-Assembly. J. Electron. Test. 25(1): 11-23 (2009) - [j4]Kan Watanabe, Masaru Fukushi, Susumu Horiguchi:
Optimal Spot-checking for Computation Time Minimization in Volunteer Computing. J. Grid Comput. 7(4): 575-600 (2009) - [c11]Yusuke Fukushima, Masaru Fukushi, Susumu Horiguchi:
Fault-Tolerant Routing Algorithm for Network on Chip without Virtual Channels. DFT 2009: 313-321 - [c10]Kan Watanabe, Masaru Fukushi, Susumu Horiguchi:
Collusion-Resistant Sabotage-Tolerance Mechanisms for Volunteer Computing Systems. ICEBE 2009: 213-218 - 2008
- [c9]Son-Hong Ngo
, Masaru Fukushi, Xiaohong Jiang, Susumu Horiguchi:
Efficient Scheduling Schemes for Sabotage-Tolerance in Volunteer Computing Systems. AINA 2008: 652-658 - [c8]Kan Watanabe, Masaru Fukushi, Susumu Horiguchi:
Optimal spot-checking to minimize the computation time in volunteer computing. IPDPS 2008: 1-8 - 2007
- [c7]Masaru Fukushi, Susumu Horiguchi, Luke Demoracski, Fabrizio Lombardi:
A Scalable Framework for Defect Isolation of DNA Self-assemlbled Networks. DFT 2007: 391-399 - 2006
- [c6]Yusuke Fukushima, Masaru Fukushi, Susumu Horiguchi:
An Improved Reconfiguration Method for Degradable Processor Arrays Using Genetic Algorithm. DFT 2006: 353-361 - 2005
- [j3]Minh Le Nguyen, Masaru Fukushi, Susumu Horiguchi:
A Probabilistic Sentence Reduction Using Maximum Entropy Model. IEICE Trans. Inf. Syst. 88-D(2): 278-288 (2005) - [c5]Masaru Fukushi, Yusuke Fukushima, Susumu Horiguchi:
A Genetic Approach for the Reconfiguration of Degradable Processor Arrays. DFT 2005: 63-71 - 2004
- [j2]Eiko Sugawara, Masaru Fukushi, Susumu Horiguchi:
Self-Reconfigurable Multi-Layer Neural Networks with Genetic Algorithms. IEICE Trans. Inf. Syst. 87-D(8): 2021-2028 (2004) - [j1]Masaru Fukushi, Susumu Horiguchi:
A self-reconfigurable hardware architecture for mesh arrays using single/double vertical track switches. IEEE Trans. Instrum. Meas. 53(2): 357-367 (2004) - [c4]Minh Le Nguyen, Akira Shimazu, Susumu Horiguchi, Tu Bao Ho, Masaru Fukushi:
Probabilistic Sentence Reduction Using Support Vector Machines. COLING 2004 - [c3]Masaru Fukushi, Susumu Horiguchi:
Reconfiguration Algorithm for Degradable Processor Arrays Based on Row and Column Rerouting. DFT 2004: 496-504 - 2003
- [c2]Eiko Sugawara, Masaru Fukushi, Susumu Horiguchi:
Fault Tolerant Multi-Layer Neural Networks with GA Training. DFT 2003: 328-335 - 2000
- [c1]Masaru Fukushi, Susumu Horiguchi:
Self-Reconfigurable Mesh Array System on FPGA. DFT 2000: 240-
Coauthor Index
aka: Yota Kurokawa
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