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Riko Radojcic
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Journal Articles
- 2012
- [j1]Xiaoxia Wu, Wei Zhao, Mark Nakamoto, Chandra Nimmagadda, Durodami Lisk, Sam Gu, Riko Radojcic, Matt Nowak, Yuan Xie:
Electrical Characterization for Intertier Connections and Timing Analysis for 3-D ICs. IEEE Trans. Very Large Scale Integr. Syst. 20(1): 186-191 (2012)
Conference and Workshop Papers
- 2013
- [c13]Miguel Corbalan, Anup Keval, Thomas Toms, Durodami Lisk, Riko Radojcic, Matt Nowak:
Power and signal integrity challenges in 3D systems. DAC 2013: 161:1-161:4 - 2012
- [c12]Riko Radojcic:
Roadmap for design and EDA infrastructure for 3D products. Hot Chips Symposium 2012: 1-21 - [c11]Chandra Nimmagadda, Durodami Lisk, Riko Radojcic:
3D stacking: Where the rubber meets the road. ICICDT 2012: 1-3 - 2010
- [c10]Xiang Hu, Thomas Toms, Riko Radojcic, Matt Nowak, Nick Yu, Chung-Kuan Cheng:
Enabling power distribution network analysis flows for 3D ICs. 3DIC 2010: 1-4 - [c9]Mark Nakamoto, Riko Radojcic, Wei Zhao, Vinay K. Dasarapu, Aditya P. Karmarkar, Xiaopeng Xu:
Simulation methodology and flow integration for 3D IC stress management. CICC 2010: 1-4 - [c8]Samta Bansal, Juan C. Rey, Andrew Yang, Myung-Soo Jang, L. C. Lu, Philippe Magarshack, Pol Marchal, Riko Radojcic:
3-D stacked die: now or future? DAC 2010: 298-299 - 2009
- [c7]Dragomir Milojevic
, Trevor E. Carlson
, Kris Croes, Riko Radojcic, Diana F. Ragett, Dirk Seynhaeve, Federico Angiolini, Geert Van der Plas
, Paul Marchal:
Automated Pathfinding tool chain for 3D-stacked integrated circuits: Practical case study. 3DIC 2009: 1-6 - [c6]Jason Cong, N. S. Nagaraj, Ruchir Puri, William H. Joyner, Jeff Burns, Moshe Gavrielov, Riko Radojcic, Peter Rickert, Hans Stork:
Moore's Law: another casualty of the financial meltdown? DAC 2009: 202-203 - [c5]Dragomir Milojevic
, Riko Radojcic, Roger Carpenter, Pol Marchal:
Pathfinding: A design methodology for fast exploration and optimisation of 3D-stacked integrated circuits. SoC 2009: 118-123 - 2008
- [c4]Matt Nowak, Jose Corleto, Christopher Chun, Riko Radojcic:
Holistic pathfinding: virtual wireless chip design for advanced technology and design exploration. DAC 2008: 593 - 2007
- [c3]Hongmei Liao, Li Song, Nickhil Jakatdar, Riko Radojcic:
Integration of CMP Modeling in RC Extraction and Timing Flow. CICC 2007: 249-252 - 2006
- [c2]Sani R. Nassif, Vijay Pitchumani, Norma Rodriguez, Dennis Sylvester, Clive Bittlestone, Riko Radojcic:
Variation-aware analysis: savior of the nanometer era? DAC 2006: 411-412 - 2005
- [c1]Matt Nowak, Riko Radojcic:
Are there economic benefits in DFM? DAC 2005: 767-768
Coauthor Index
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