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ORCIDWei Ding 0008
Person information
- affiliation: Qualcomm Innovation Center Inc., San Diego, CA, USA
- affiliation (PhD 2014): Pennsylvania State University, USA
Other persons with the same name
- Wei Ding — disambiguation page
- Wei Ding 0001 — Southeast University, School of Computer Science and Engineering, Nanjing, China
- Wei Ding 0002 — IBM China Research Laboratory, Beijing, China
- Wei Ding 0003
![[0000-0002-3383-551X]](https://dblp.uni-trier.de/img/orcid-mark.12x12.png "0000-0002-3383-551X")
— University of Massachusetts, Department of Computer Science, Boston, MA, USA (and 1 more) - Wei Ding 0004 — Sonic Solutions
- Wei Ding 0005 — China Earthquake Administration, Key Laboratory of Earthquake Geodesy, Wuhan, China
- Wei Ding 0006 — Zhejiang University of Water Resources and Electric Power, Hangzhou, China
- Wei Ding 0007 — Barclays Investment Bank, New York, NY, USA
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2010 – 2019
- 2017
[j2]Özcan Özturk, Umut Orhan, Wei Ding, Praveen Yedlapalli, Mahmut Taylan Kandemir:
Cache Hierarchy-Aware Query Mapping on Emerging Multicore Architectures. IEEE Trans. Computers 66(3): 403-415 (2017)- [c23]Akbar Sharifi, Wei Ding, Diana R. Guttman, Hui Zhao, Xulong Tang, Mahmut T. Kandemir, Chita R. Das:
DEMM: A Dynamic Energy-Saving Mechanism for Multicore Memories. MASCOTS 2017: 210-220 - 2015
- [c22]Jithendra Srinivas, Wei Ding, Mahmut T. Kandemir:
Reactive tiling. CGO 2015: 91-102 - [c21]Jun Liu, Jagadish Kotra, Wei Ding, Mahmut T. Kandemir:
Network footprint reduction through data access and computation placement in NoC-based manycores. DAC 2015: 181:1-181:6 - [c20]Wei Ding, Xulong Tang, Mahmut T. Kandemir, Yuanrui Zhang, Emre Kultursay:
Optimizing off-chip accesses in multicores. PLDI 2015: 131-142 - 2014
- [c19]Wei Ding, Mahmut T. Kandemir, Diana R. Guttman, Adwait Jog, Chita R. Das, Praveen Yedlapalli:
Trading cache hit rate for memory performance. PACT 2014: 357-368 - [c18]Umut Orhan, Wei Ding, Praveen Yedlapalli, Mahmut T. Kandemir, Özcan Özturk:
A cache topology-aware multi-query scheduler for multicore architectures. IISWC 2014: 86-87 - [c17]Mahmut T. Kandemir, Wei Ding, Diana R. Guttman:
Quantifying and Optimizing the Impact of Victim Cache Line Selection in Manycore Systems. MASCOTS 2014: 385-394 - [c16]Wei Ding, Diana R. Guttman, Mahmut T. Kandemir:
Compiler Support for Optimizing Memory Bank-Level Parallelism. MICRO 2014: 571-582 - [c15]Wei Ding, Mahmut T. Kandemir:
CApRI: CAche-conscious data reordering for irregular codes. SIGMETRICS 2014: 477-489 - 2013
- [j1]Wei Ding, Yuanrui Zhang, Mahmut T. Kandemir, Seung Woo Son:
Compiler-directed file layout optimization for hierarchical storage systems. Sci. Program. 21(3-4): 65-78 (2013) - [c14]Wei Ding, Jun Liu, Mahmut T. Kandemir, Mary Jane Irwin:
Reshaping cache misses to improve row-buffer locality in multicore systems. PACT 2013: 235-244 - [c13]Wei Ding, Yuanrui Zhang, Mahmut T. Kandemir, Jithendra Srinivas, Praveen Yedlapalli:
Locality-aware mapping and scheduling for multicores. CGO 2013: 12:1-12:12 - [c12]Jun Liu, Wei Ding, Ohyoung Jang, Mahmut T. Kandemir:
Data layout optimization for GPGPU architectures. PPoPP 2013: 283-284 - 2012
- [c11]Wei Ding, Mahmut T. Kandemir, Yuanrui Zhang, Emre Kultursay:
Off-chip access localization for NoC-based multicores. PACT 2012: 447-448 - [c10]Hui Zhao, Ohyoung Jang, Wei Ding, Yuanrui Zhang, Mahmut T. Kandemir, Mary Jane Irwin:
A hybrid NoC design for cache coherence optimization for chip multiprocessors. DAC 2012: 834-842 - [c9]Wei Ding, Mahmut T. Kandemir:
Improving last level cache locality by integrating loop and data transformations. ICCAD 2012: 65-72 - [c8]Jun Liu, Yuanrui Zhang, Ohyoung Jang, Wei Ding, Mahmut T. Kandemir:
A compiler framework for extracting superword level parallelism. PLDI 2012: 347-358 - [c7]Wei Ding, Yuanrui Zhang, Mahmut T. Kandemir, Seung Woo Son:
Compiler-directed file layout optimization for hierarchical storage systems. SC 2012: 41 - 2011
- [c6]Yuanrui Zhang, Wei Ding, Jun Liu, Mahmut T. Kandemir:
Optimizing Data Layouts for Parallel Computation on Multicores. PACT 2011: 143-154 - [c5]Wei Ding, Jithendra Srinivas, Mahmut T. Kandemir, Mustafa Karaköy:
Compiler Directed Data Locality Optimization for Multicore Architectures. PACT 2011: 171-172 - [c4]Jun Liu, Yuanrui Zhang, Wei Ding, Mahmut T. Kandemir:
On-chip cache hierarchy-aware tile scheduling for multicore machines. CGO 2011: 161-170 - [c3]Wei Ding, Yuanrui Zhang, Jun Liu, Mahmut T. Kandemir:
Optimizing data locality using array tiling. ICCAD 2011: 142-149 - [c2]Hui Zhao, Mahmut T. Kandemir, Wei Ding, Mary Jane Irwin:
Exploring heterogeneous NoC design space. ICCAD 2011: 787-793 - [c1]Yuanrui Zhang, Wei Ding, Mahmut T. Kandemir, Jun Liu, Ohyoung Jang:
A data layout optimization framework for NUCA-based multicores. MICRO 2011: 489-500
Coauthor Index
aka: Mahmut Taylan Kandemir
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