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ORCIDPeng Yang 0003
Person information
- affiliation: Hong Kong University of Science and Technology, Department of Electronic and Computer Engineering, Hong Kong
Other persons with the same name
- Peng Yang — disambiguation page
- Peng Yang 0001 — Rutgers University, Computer Science Department, Piscataway, NJ, USA (and 1 more)
- Peng Yang 0002 — University of Tokyo, Japan
- Peng Yang 0004
![[0000-0001-8964-0597]](https://dblp.uni-trier.de/img/orcid-mark.12x12.png "0000-0001-8964-0597")
— Huazhong University of Science and Technology, School of Electronic Information and Communications, Wuhan, China (and 2 more) - Peng Yang 0005 — Ministry of Agriculture, Key Laboratory of Agri-informatics, Beijing, China (and 1 more)
- Peng Yang 0006 — Washington University in St. Louis, Preston M. Green Department of Electrical and Systems Engineering, MO, USA
- Peng Yang 0007 — Nanjing Audit University, School of Technology, China (and 2 more)
- Peng Yang 0008 — Southern University of Science and Technology, Department of Computer Science and Engineering, Shenzhen, China (and 1 more)
- Peng Yang 0009 — Beihang University, School of Electronic and Information Engineering / Key Laboratory of Advanced Technology of Near Space Information System, Beijing, China
- Peng Yang 0010 — King Abdullah University of Science and Technology, Saudi Arabia
- Peng Yang 0011 — Shenzhen University, Guangdong Key Laboratory for Biomedical Measurements and Ultrasound Imaging, China
- Peng Yang 0012 — Chongqing University of Arts and Sciences, China
- Peng Yang 0013 — Baidu Research, Cognitive Computing Lab, WA, USA
- Peng Yang 0014 — Southeast University, School of Computer Science and Engineering, Nanjing, China (and 1 more)
- Peng Yang 0015 — Hebei University of Technology, State Key Laboratory of Reliability and Intelligence of Electrical Equipment, School of Artificial Intelligence, Tianjin, China
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Journal Articles
- 2020
[j17]Peng Yang, Zhehui Wang, Zhifei Wang, Jiang Xu, Yi-Shing Chang, Xuanqi Chen, Rafael K. V. Maeda, Jun Feng:
Multidomain Inter/Intrachip Silicon Photonic Networks for Energy-Efficient Rack-Scale Computing Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(3): 626-639 (2020)- [j16]Zhifei Wang, Peng Yang, Yi-Shing Chang, Jiang Xu, Xuanqi Chen, Zhehui Wang, Jun Feng:
A Cross-Layer Optimization Framework for Integrated Optical Switches in Data Centers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(3): 640-653 (2020) - [j15]Xuanqi Chen, Zhifei Wang, Yi-Shing Chang, Jiang Xu, Jun Feng, Peng Yang, Zhehui Wang, Luan H. K. Duong:
Modeling and Analysis of Optical Modulators Based on Free-Carrier Plasma Dispersion Effect. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(5): 977-990 (2020) - 2019
- [j14]Luan H. K. Duong, Peng Yang, Zhifei Wang, Yi-Shing Chang, Jiang Xu, Zhehui Wang, Xuanqi Chen:
Crosstalk Noise Reduction Through Adaptive Power Control in Inter/Intra-Chip Optical Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(1): 43-56 (2019) - [j13]Zhongyuan Tian, Zhe Wang, Jiang Xu, Haoran Li, Peng Yang, Rafael Kioji Vivas Maeda:
Collaborative Power Management Through Knowledge Sharing Among Multiple Devices. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(7): 1203-1215 (2019) - 2018
- [j12]Haoran Li, Jiang Xu, Zhe Wang, Rafael K. V. Maeda, Peng Yang, Zhongyuan Tian:
Workload-Aware Adaptive Power Delivery System Management for Many-Core Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(10): 2076-2086 (2018) - [j11]Weichen Liu, Zhe Wang, Peng Yang, Jiang Xu, Bin Li, Ravi R. Iyer, Ramesh Illikkal:
A Systematic and Realistic Network-on-Chip Traffic Modeling and Generation Technique for Emerging Many-Core Systems. IEEE Trans. Multi Scale Comput. Syst. 4(2): 113-126 (2018) - 2017
- [j10]Haoran Li, Xuan Wang, Jiang Xu, Zhe Wang, Rafael K. V. Maeda, Zhehui Wang, Peng Yang, Luan H. K. Duong, Zhifei Wang:
Energy-Efficient Power Delivery System Paradigms for Many-Core Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(3): 449-462 (2017) - 2016
- [j9]Xuan Wang, Jiang Xu, Zhe Wang, Haoran Li, Peng Yang, Luan H. K. Duong, Rafael K. V. Maeda, Zhifei Wang:
Alleviate Chip Pin Constraint for Multicore Processor by On/Off-Chip Power Delivery System Codesign. ACM J. Emerg. Technol. Comput. Syst. 13(2): 19:1-19:24 (2016) - [j8]Zhehui Wang, Jiang Xu, Peng Yang, Xuan Wang, Zhe Wang, Luan Huu Kinh Duong, Zhifei Wang, Rafael Kioji Vivas Maeda, Haoran Li:
Improve Chip Pin Performance Using Optical Interconnects. IEEE Trans. Very Large Scale Integr. Syst. 24(4): 1574-1587 (2016) - [j7]Zhehui Wang, Jiang Xu, Peng Yang, Luan Huu Kinh Duong, Zhifei Wang, Xuan Wang, Zhe Wang, Haoran Li, Rafael Kioji Vivas Maeda:
A Holistic Modeling and Analysis of Optical-Electrical Interfaces for Inter/Intra-chip Interconnects. IEEE Trans. Very Large Scale Integr. Syst. 24(7): 2462-2474 (2016) - [j6]Luan H. K. Duong, Zhehui Wang, Mahdi Nikdast, Jiang Xu, Peng Yang, Zhifei Wang, Zhe Wang, Rafael K. V. Maeda, Haoran Li, Xuan Wang, Sébastien Le Beux, Yvain Thonnart:
Coherent and Incoherent Crosstalk Noise Analyses in Interchip/Intrachip Optical Interconnection Networks. IEEE Trans. Very Large Scale Integr. Syst. 24(7): 2475-2487 (2016) - [j5]Zhe Wang, Xuan Wang, Jiang Xu, Haoran Li, Rafael K. V. Maeda, Zhehui Wang, Peng Yang, Luan H. K. Duong, Zhifei Wang:
An Adaptive Process-Variation-Aware Technique for Power-Gating-Induced Power/Ground Noise Mitigation in MPSoC. IEEE Trans. Very Large Scale Integr. Syst. 24(12): 3373-3386 (2016) - 2015
- [j4]Xuan Wang, Jiang Xu, Zhe Wang, Kevin J. Chen, Xiaowen Wu, Zhehui Wang, Peng Yang, Luan H. K. Duong:
An Analytical Study of Power Delivery Systems for Many-Core Processors Using On-Chip and Off-Chip Voltage Regulators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(9): 1401-1414 (2015) - [j3]Mahdi Nikdast, Jiang Xu, Luan Huu Kinh Duong, Xiaowen Wu, Xuan Wang, Zhehui Wang, Zhe Wang, Peng Yang, Yaoyao Ye, Qinfen Hao:
Crosstalk Noise in WDM-Based Optical Networks-on-Chip: A Formal Study and Comparison. IEEE Trans. Very Large Scale Integr. Syst. 23(11): 2552-2565 (2015) - 2014
- [j2]Luan H. K. Duong, Mahdi Nikdast, Sébastien Le Beux, Jiang Xu, Xiaowen Wu, Zhehui Wang, Peng Yang:
A Case Study of Signal-to-Noise Ratio in Ring-Based Optical Networks-on-Chip. IEEE Des. Test 31(5): 55-65 (2014) - [j1]Yaoyao Ye, Zhehui Wang, Peng Yang, Jiang Xu, Xiaowen Wu, Xuan Wang, Mahdi Nikdast, Zhe Wang, Luan H. K. Duong:
System-Level Modeling and Analysis of Thermal Effects in WDM-Based Optical Networks-on-Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(11): 1718-1731 (2014)
Conference and Workshop Papers
- 2018
- [c13]Zhongyuan Tian, Zhe Wang, Haoran Li, Peng Yang, Rafael Kioji Vivas Maeda, Jiang Xu:
Multi-device collaborative management through knowledge sharing. ASP-DAC 2018: 22-27 - [c12]Peng Yang, Zhengbin Pang, Zhifei Wang, Zhehui Wang, Min Xie, Xuanqi Chen, Luan H. K. Duong, Jiang Xu:
RSON: An inter/intra-chip silicon photonic network for rack-scale computing systems. DATE 2018: 1369-1374 - [c11]Xuanqi Chen, Zhifei Wang, Yi-Shing Chang, Jiang Xu, Peng Yang, Zhehui Wang, Luan H. K. Duong:
A Comprehensive Electro-Optical Model for Silicon Photonic Switches. ISVLSI 2018: 76-81 - 2017
- [c10]Zhe Wang, Zhongyuan Tian, Jiang Xu, Rafael K. V. Maeda, Haoran Li, Peng Yang, Zhehui Wang, Luan H. K. Duong, Zhifei Wang, Xuanqi Chen:
Modular reinforcement learning for self-adaptive energy efficiency optimization in multicore system. ASP-DAC 2017: 684-689 - [c9]Zhehui Wang, Zhengbin Pang, Peng Yang, Jiang Xu, Xuanqi Chen, Rafael K. V. Maeda, Zhifei Wang, Luan H. K. Duong, Haoran Li, Zhe Wang:
MOCA: an Inter/Intra-Chip Optical Network for Memory. DAC 2017: 86:1-86:6 - [c8]Haoran Li, Jiang Xu, Zhe Wang, Peng Yang, Rafael K. V. Maeda, Zhongyuan Tian:
Adaptive power delivery system management for many-core processors with on/off-chip voltage regulators. DATE 2017: 1265-1268 - 2016
- [c7]Rafael K. V. Maeda, Peng Yang, Xiaowen Wu, Zhe Wang, Jiang Xu, Zhehui Wang, Haoran Li, Luan H. K. Duong, Zhifei Wang:
JADE: a Heterogeneous Multiprocessor System Simulation Platform Using Recorded and Statistical Application Models. AISTECS@HiPEAC 2016: 8:1-8:6 - [c6]Peng Yang, Shigeru Nakamura, Kenichiro Yashiki, Zhehui Wang, Luan H. K. Duong, Zhifei Wang, Xuanqi Chen, Yuichi Nakamura, Jiang Xu:
Inter/intra-chip optical interconnection network: opportunities, challenges, and implementations. NOCS 2016: 1-8 - 2015
- [c5]Zhehui Wang, Jiang Xu, Peng Yang, Xuan Wang, Zhe Wang, Luan H. K. Duong, Zhifei Wang, Haoran Li, Rafael Kioji Vivas Maeda, Xiaowen Wu, Yaoyao Ye, Qinfen Hao:
Alleviate chip I/O pin constraints for multicore processors through optical interconnects. ASP-DAC 2015: 791-796 - [c4]Zhe Wang, Xuan Wang, Jiang Xu, Xiaowen Wu, Zhehui Wang, Peng Yang, Luan H. K. Duong, Haoran Li, Rafael Kioji Vivas Maeda, Zhifei Wang:
Adaptively tolerate power-gating-induced power/ground noise under process variations. DATE 2015: 483-488 - [c3]Luan H. K. Duong, Mahdi Nikdast, Jiang Xu, Zhehui Wang, Yvain Thonnart, Sébastien Le Beux, Peng Yang, Xiaowen Wu, Zhifei Wang:
Coherent crosstalk noise analyses in ring-based optical interconnects. DATE 2015: 501-506 - [c2]Chuan Tang, Dan Liu, Zuocheng Xing, Peng Yang, Zhe Wang, Jiang Xu:
Memory Access Analysis of Many-core System with Abundant Bandwidth. MCSoC 2015: 187-194 - 2014
- [c1]Mahdi Nikdast, Luan H. K. Duong, Jiang Xu, Sébastien Le Beux, Xiaowen Wu, Zhehui Wang, Peng Yang, Yaoyao Ye:
CLAP: a crosstalk and loss analysis platform for optical interconnects. NOCS 2014: 172-173
Coauthor Index
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