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Gensuke Goto
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2010 – 2019
- 2014
- [c5]Hikaru Tamura, Kiyoshi Kato, Takahiko Ishizu, Tatsuya Onuki, Wataru Uesugi, Takuro Ohmaru, Kazuaki Ohshima
, Hidetomo Kobayashi, Seiichi Yoneda, Atsuo Isobe, Naoaki Tsutsui, Suguru Hondo, Yasutaka Suzuki, Yutaka Okazaki, Tomoaki Atsumi, Yutaka Shionoiri, Yukio Maehashi, Gensuke Goto, Masahiro Fujita, James Myers, Pekka Korpinen, Jun Koyama, Yoshitaka Yamamoto, Shunpei Yamazaki:
Embedded SRAM and Cortex-M0 core with backup circuits using a 60-nm crystalline oxide semiconductor for power gating. COOL Chips 2014: 1-3 - [c4]Atsuo Isobe, Hikaru Tamura, Kiyoshi Kato, Takuro Ohmaru, Wataru Uesugi, Takahiko Ishizu, Tatsuya Onuki, Kazuaki Ohshima
, Takanori Matsuzaki, Atsushi Hirose, Yasutaka Suzuki, Naoaki Tsutsui, Tomoaki Atsumi, Yutaka Shionoiri, Gensuke Goto, Jun Koyama, Masahiro Fujita, Shunpei Yamazaki:
A 32-bit CPU with zero standby power and 1.5-clock sleep/2.5-clock wake-up achieved by utilizing a 180-nm C-axis aligned crystalline In-Ga-Zn oxide transistor. VLSIC 2014: 1-2 - 2011
- [c3]Jubee Tada, Ryusuke Egawa, Kazushige Kawai, Hiroaki Kobayashi, Gensuke Goto:
A middle-grain circuit partitioning strategy for 3-D integrated floating-point multipliers. 3DIC 2011: 1-6
2000 – 2009
- 2009
- [c2]Ryusuke Egawa, Jubee Tada, Hiroaki Kobayashi, Gensuke Goto:
Evaluation of fine grain 3-D integrated arithmetic units. 3DIC 2009: 1-8
1990 – 1999
- 1990
- [c1]Akira Katsuno, Hiromasa Takahashi, Hajime Kubosawa, Tomio Sato, Atsuhiro Suga, Gensuke Goto:
A 64-bit floating-point processing unit with a horizontal instruction code for parallel operations. ICCD 1990: 347-350
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