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Quentin L. Meunier
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2020 – today
- 2024
- [i4]Xunyue Hu, Quentin L. Meunier, Emmanuelle Encrenaz:
Blind-Folded: Simple Power Analysis Attacks using Data with a Single Trace and no Training. IACR Cryptol. ePrint Arch. 2024: 589 (2024) - 2023
- [j11]Thomas Romera, Andrea Petreto, Florian Lemaitre, Manuel Bouyer, Quentin L. Meunier, Lionel Lacassagne, Daniel Etiemble:
Optical flow algorithms optimized for speed, energy and accuracy on embedded GPUs. J. Real Time Image Process. 20(2): 32 (2023) - [j10]Quentin L. Meunier
, Etienne Pons, Karine Heydemann
:
LeakageVerif: Efficient and Scalable Formal Verification of Leakage in Symbolic Expressions. IEEE Trans. Software Eng. 49(6): 3359-3375 (2023) - [c14]Quentin L. Meunier, Abdul Rahman Taleb:
VerifMSI: Practical Verification of Hardware and Software Masking Schemes Implementations. SECRYPT 2023: 520-527 - [i3]Quentin L. Meunier, Abdul Rahman Taleb:
VerifMSI: Practical Verification of Hardware and Software Masking Schemes Implementations. IACR Cryptol. ePrint Arch. 2023: 732 (2023) - 2022
- [j9]Arnaud de Grandmaison, Karine Heydemann
, Quentin L. Meunier
:
ARMISTICE: Microarchitectural Leakage Modeling for Masked Software Formal Verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 3733-3744 (2022) - [i2]Arnaud de Grandmaison, Karine Heydemann, Quentin L. Meunier:
Armistice: Micro-Architectural Leakage Modelling for Masked Software Formal Verification. IACR Cryptol. ePrint Arch. 2022: 467 (2022) - 2021
- [j8]Pascal Vivet
, Eric Guthmuller
, Yvain Thonnart
, Gaël Pillonnet
, César Fuguet Tortolero
, Ivan Miro-Panades
, Guillaume Moritz, Jean Durupt, Christian Bernard, Didier Varreau, Julian J. H. Pontes
, Sébastien Thuries, David Coriat, Michel Harrand
, Denis Dutoit, Didier Lattard, Lucile Arnaud, Jean Charbonnier
, Perceval Coudrain
, Arnaud Garnier, Frédéric Berger, Alain Gueugnot, Alain Greiner, Quentin L. Meunier
, Alexis Farcy, Alexandre Arriordaz
, Séverine Cheramy
, Fabien Clermidy:
IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management. IEEE J. Solid State Circuits 56(1): 79-97 (2021) - [c13]Thomas Romera, Andrea Petreto, Florian Lemaitre, Manuel Bouyer, Quentin L. Meunier, Lionel Lacassagne:
Implementations Impact on Iterative Image Processing for Embedded GPU. EUSIPCO 2021: 736-740 - [i1]Quentin L. Meunier, Etienne Pons, Karine Heydemann:
LeakageVerif: Scalable and Efficient Leakage Verification in Symbolic Expressions. IACR Cryptol. ePrint Arch. 2021: 1468 (2021) - 2020
- [j7]Nicolas Belleville
, Damien Couroussé
, Karine Heydemann, Quentin L. Meunier, Inès Ben El Ouahma:
Maskara: Compilation of a Masking Countermeasure With Optimized Polynomial Interpolation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(11): 3774-3786 (2020) - [c12]Pascal Vivet
, Eric Guthmuller
, Yvain Thonnart
, Gaël Pillonnet
, Guillaume Moritz, Ivan Miro-Panades, César Fuguet Tortolero
, Jean Durupt, Christian Bernard, Didier Varreau, Julian J. H. Pontes, Sébastien Thuries, David Coriat, Michel Harrand, Denis Dutoit, Didier Lattard, Lucile Arnaud, Jean Charbonnier, Perceval Coudrain
, Arnaud Garnier, Frédéric Berger, Alain Gueugnot, Alain Greiner, Quentin L. Meunier, Alexis Farcy, Alexandre Arriordaz, Séverine Cheramy, Fabien Clermidy:
2.3 A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm2 Inter-Chiplet Interconnects and 156mW/mm2@ 82%-Peak-Efficiency DC-DC Converters. ISSCC 2020: 46-48
2010 – 2019
- 2019
- [j6]Inès Ben El Ouahma, Quentin L. Meunier, Karine Heydemann, Emmanuelle Encrenaz:
Side-channel robustness analysis of masked assembly codes using a symbolic approach. J. Cryptogr. Eng. 9(3): 231-242 (2019) - [c11]Andrea Petreto, Thomas Romera, Florian Lemaitre, Ian Masliah, Boris Gaillard, Manuel Bouyer, Quentin L. Meunier, Lionel Lacassagne:
A New Real-Time Embedded Video Denoising Algorithm. DASIP 2019: 47-52 - 2018
- [c10]Andrea Petreto, Arthur M. Hennequin, Thomas Koehler, Thomas Romera, Yohan Fargeix, Boris Gaillard, Manuel Bouyer, Quentin L. Meunier, Lionel Lacassagne:
Energy and Execution Time Comparison of Optical Flow Algorithms on SIMD and GPU Architectures. DASIP 2018: 25-30 - [c9]Arthur M. Hennequin, Lionel Lacassagne, Laurent Cabaret
, Quentin L. Meunier:
A new Direct Connected Component Labeling and Analysis Algorithms for GPUs. DASIP 2018: 76-81 - [c8]Eric Guthmuller
, César Fuguet Tortolero
, Pascal Vivet
, Christian Bernard, Ivan Miro Panades, Jean Durupt, E. Beignc, Didier Lattard, Séverine Cheramy, Alain Greiner, Quentin L. Meunier, Pirouz Bazargan-Sabet:
A 29 Gops/Watt 3D-Ready 16-Core Computing Fabric with Scalable Cache Coherent Architecture Using Distributed L2 and Adaptive L3 Caches. ESSCIRC 2018: 318-321 - [c7]Quentin L. Meunier, Yann Thierry-Mieg, Emmanuelle Encrenaz:
Modeling a Cache Coherence Protocol with the Guarded Action Language. MARS/VPT@ETAPS 2018: 88-103 - 2017
- [j5]Clement Devigne, Jean-Baptiste Bréjon, Quentin L. Meunier
, Franck Wajsbürt:
Executing secured virtual machines within a manycore architecture. Microprocess. Microsystems 48: 21-35 (2017) - [c6]Inès Ben El Ouahma, Quentin L. Meunier, Karine Heydemann, Emmanuelle Encrenaz:
Symbolic Approach for Side-Channel Resistance Analysis of Masked Assembly Codes. PROOFS 2017: 17-32 - [c5]Hao Liu, Quentin L. Meunier, Alain Greiner:
Decoupling Translation Lookaside Buffer Coherence from Cache Coherence. ISVLSI 2017: 92-97 - 2016
- [c4]Mohamed Lamine Karaoui, Pierre-Yves Peneau
, Quentin L. Meunier, Franck Wajsbürt, Alain Greiner:
Exploiting Large Memory Using 32-Bit Energy-Efficient Manycore Architectures. MCSoC 2016: 61-68 - 2015
- [j4]Mohamed Lamine Karaoui, Quentin L. Meunier, Franck Wajsbürt, Alain Greiner:
GECOS : Mécanisme de synchronisation passant à l'échelle à plusieurs lecteurs et un écrivain pour structures chaînées. Tech. Sci. Informatiques 34(1-2): 53-78 (2015) - [c3]Hao Liu, Clement Devigne, Lucas Garcia, Quentin L. Meunier, Franck Wajsbürt, Alain Greiner:
RWT: Suppressing Write-Through Cost When Coherence is Not Needed. ISVLSI 2015: 434-439 - [c2]Clement Devigne, Jean-Baptiste Bréjon, Quentin L. Meunier, Franck Wajsbürt:
Executing secured virtual machines within a manycore architecture. NORCAS 2015: 1-4 - 2011
- [j3]Quentin L. Meunier, Frédéric Pétrot:
Systèmes de mémoire transactionnelle pour les architectures à base de NoC Conception, implémentation et comparaison de deux politiques. Tech. Sci. Informatiques 30(9): 1061-1087 (2011) - [c1]Jean-Charles Naud, Quentin L. Meunier, Daniel Ménard, Olivier Sentieys:
Fixed-point accuracy evaluation in the context of conditional structures. EUSIPCO 2011: 1934-1938 - 2010
- [b1]Quentin L. Meunier:
Étude de deux solutions pour le support matériel de la programmation parallèle dans les multiprocesseurs intégrés : vol de travail et mémoires transactionnelles. (Study of two Solutions for Hardware Support of Parallel Programming in Integrated Multiprocessors: Work-Stealing and Transactional Memory). Grenoble Institute of Technology, France, 2010 - [j2]Quentin L. Meunier, Frédéric Pétrot:
Lightweight Transactional Memory systems for NoCs based architectures: Design, implementation and comparison of two policies. J. Parallel Distributed Comput. 70(10): 1024-1041 (2010) - [j1]Quentin L. Meunier, Frédéric Pétrot, Jean-Louis Roch:
Hardware/software support for adaptive work-stealing in on-chip multiprocessor. J. Syst. Archit. 56(8): 392-406 (2010)
Coauthor Index
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last updated on 2024-05-08 21:47 CEST by the dblp team
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