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2000 – 2009
- 2007
[j5]Olivier Marichal, Geert Wybo, Benjamin Van Camp, Pieter Vanysacker, Bart Keppens:
SCR-based ESD protection in nanometer SOI technologies. Microelectron. Reliab. 47(7): 1060-1068 (2007)- 2006
- [j4]Bart Keppens, Markus P. J. Mergens, Cong Son Trinh, Christian C. Russ, Benjamin Van Camp, Koen G. Verhaege:
ESD protection solutions for high voltage technologies. Microelectron. Reliab. 46(5-6): 677-688 (2006) - 2005
- [c2]Markus P. J. Mergens, Geert Wybo, Bart Keppens, Benjamin Van Camp, Frederic De Ranter, Koen G. Verhaege, John Armer, Phillip Jozwiak, Christian C. Russ:
ESD protection circuit design for ultra-sensitive IO applications in advanced sub-90nm CMOS technologies. ISCAS (2) 2005: 1194-1197 - 2004
- [c1]Markus P. J. Mergens, John Armer, Phillip Jozwiak, Bart Keppens, Frederic De Ranter, Koen G. Verhaege, R. Kumar:
Active-source-pump (ASP) technique for ESD design window expansion and ultra-thin gate oxide protection in sub-90nm technologies. CICC 2004: 251-254 - 2003
- [j3]S. Trinh, Markus P. J. Mergens, Koen G. Verhaege, Christian C. Russ, John Armer, Phillip Jozwiak, Bart Keppens, Russ Mohn, G. Taylor, Frederic De Ranter:
Multi-finger turn-on circuits and design techniques for enhanced ESD performance and width scaling. Microelectron. Reliab. 43(9-11): 1537-1543 (2003) - 2002
- [j2]Bart Keppens, Vincent De Heyn, M. Natarajan Iyer, Vesselin K. Vassilev, Guido Groeseneken
:
Significance of the failure criterion on transmission line pulse testing. Microelectron. Reliab. 42(6): 901-907 (2002) - 2001
- [j1]Karlheinz Bock, Bart Keppens, Vincent De Heyn, Guido Groeseneken, L. Y. Ching, A. Naem:
Influence of gate length on ESD-performance for deep submicron CMOS technology. Microelectron. Reliab. 41(3): 375-383 (2001)
Coauthor Index
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