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Yue Xing 0001

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affiliation: Princeton University, Department of Electrical Engineering, NJ, USA
affiliation (former): Tsinghua University, Department of Electronic Engineering, TNList, Beijing, China

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2020 – today

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2023
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Huaixi Lu, Yue Xing, Aarti Gupta, Sharad Malik:
SoC Protocol Implementation Verification Using Instruction-Level Abstraction Specifications. ACM Trans. Design Autom. Electr. Syst. 28(6): 89:1-89:24 (2023)
2022
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Yue Xing, Aarti Gupta, Sharad Malik:
Generalizing Tandem Simulation: Connecting High-level and RTL Simulation Models. ASP-DAC 2022: 154-159
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Yue Xing, Huaixi Lu, Aarti Gupta, Sharad Malik:
Compositional Verification Using a Formal Component and Interface Specification. ICCAD 2022: 72:1-72:9
2021
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Yue Xing, Huaixi Lu, Aarti Gupta, Sharad Malik:
Leveraging Processor Modeling and Verification for General Hardware Modules. DATE 2021: 1130-1135

2010 – 2019

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2018
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Yue Xing, Bo-Yuan Huang, Aarti Gupta, Sharad Malik:
A formal instruction-level GPU model for scalable verification. ICCAD 2018: 130
2017
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Xinghua Yang, Yue Xing, Fei Qiao, Huazhong Yang:
Multistage Latency Adders Architecture Employing Approximate Computing. J. Circuits Syst. Comput. 26(3): 1750039:1-1750039:18 (2017)
2016
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Xinghua Yang, Yue Xing, Fei Qiao, Qi Wei, Huazhong Yang:
Approximate Adder with Hybrid Prediction and Error Compensation Technique. ISVLSI 2016: 373-378

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