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"Multistage Latency Adders Architecture Employing Approximate Computing."

Xinghua Yang et al. (2017)

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DOI: 10.1142/S0218126617500396

access: closed

type: Journal Article

metadata version: 2023-09-04

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  - https://dblp.org/rec/journals/jcsc/YangXQY17
Xinghua Yang, Yue Xing, Fei Qiao, Huazhong Yang:
Multistage Latency Adders Architecture Employing Approximate Computing. J. Circuits Syst. Comput. 26(3): 1750039:1-1750039:18 (2017)

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