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ORCIDBohan Yang 0001
Person information
- affiliation: Tsinghua University, Institute of Microelectronics, Beijing, China
- affiliation (former): K.U. Leuven, Belgium
Other persons with the same name
- Bohan Yang 0002 — Shanghai Jiao Tong University
- Bohan Yang 0003 — Chinese Academy of Social Science, Department of World Economics and Politics, China
- Bohan Yang 0005
![[0000-0002-5305-7591]](https://dblp.uni-trier.de/img/orcid-mark.12x12.png "0000-0002-5305-7591")
— Chinese University of Hong Kong, Department of Mechanical and Automation Engineering, Hong Kong - Bohan Yang 0006 — Cornell University, Ithaca, NY, USA
- Bohan Yang 0007 — Shandong University, School of Mathematics, Jinan, China
- Bohan Yang 0008 — Wuhan University, Global Navigation Satellite System Research Center, Wuhan, China
- Bohan Yang 0009 — Southwest Petroleum University, School of Mechatronic Engineering, Chengdu, China
- Bohan Yang 0010 — Guizhou Normal University, School of Physics and Electronic Science, Guiyang, China
- Bohan Yang 0011 — Chinese Academy of Sciences, Changchun Institute of Optics, Fine Mechanics and Physics, China
- Bohan Yang 0012 — Chinese Academy of Sciences, Shenyang Institute of Automation, State Key Laboratory of Robotics, China
- Bohan Yang 0013 — Harbin Institute of Technology, School of Electronics and Information Engineering, China
- Bohan Yang 0014 — Zhejiang University, College of Computer Science and Technology, Hangzhou, China
- Bohan Yang 0015 — Wuhan University, School of Cyber Science and Engineering, China
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2020 – today
- 2024
[j15]Jiangxue Liu, Cankun Zhao, Shuohang Peng, Bohan Yang, Hang Zhao, Xiangdong Han, Min Zhu, Shaojun Wei, Leibo Liu:
A Low-Latency High-Order Arithmetic to Boolean Masking Conversion. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2024(2): 630-653 (2024)- [j14]Xiangren Chen, Bohan Yang, Jianfeng Zhu, Jun Liu, Shuying Yin, Guang Yang, Min Zhu, Shaojun Wei, Leibo Liu:
UpWB: An Uncoupled Architecture Design for White-box Cryptography Using Vectorized Montgomery Multiplication. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2024(2): 677-713 (2024) - [j13]Cankun Zhao, Hang Zhao, Jiangxue Liu, Bohan Yang, Wenping Zhu, Shuying Yin, Min Zhu, Shaojun Wei, Leibo Liu:
Breaking Ground: A New Area Record for Low-Latency First-Order Masked SHA-3 Advancing from the 4x Area Era to the 3x Area Era. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2024(4): 231-257 (2024) - [c30]Hang Zhao, Cankun Zhao, Wenping Zhu, Bohan Yang, Shaojun Wei, Leibo Liu:
Sparse Polynomial Multiplication-Based High-Performance Hardware Implementation for CRYSTALS-Dilithium. HOST 2024: 150-159 - [i5]Jiangxue Liu, Cankun Zhao, Shuohang Peng, Bohan Yang, Hang Zhao, Xiangdong Han, Min Zhu, Shaojun Wei, Leibo Liu:
A Low-Latency High-Order Arithmetic to Boolean Masking Conversion. IACR Cryptol. ePrint Arch. 2024: 45 (2024) - 2023
- [j12]Shuqin Su, Bohan Yang, Vladimir Rozic, Mingyuan Yang, Min Zhu, Shaojun Wei, Leibo Liu:
A Closer Look at the Chaotic Ring Oscillators based TRNG Design. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2023(2): 381-417 (2023) - [c29]Shuohang Peng, Bohan Yang, Shuying Yin, Hang Zhao, Cankun Zhao, Shaojun Wei, Leibo Liu:
A Low-Randomness First-Order Masked Xoodyak. HOST 2023: 48-56 - [i4]Shuqin Su, Bohan Yang, Vladimir Rozic, Mingyuan Yang, Min Zhu, Shaojun Wei, Leibo Liu:
A Closer Look at the Chaotic Ring Oscillators based TRNG Design. IACR Cryptol. ePrint Arch. 2023: 40 (2023) - 2022
- [j11]Chenchen Deng, Min Zhu, Jinjiang Yang, Youyu Wu, Jiaji He, Bohan Yang, Jianfeng Zhu, Shouyi Yin, Shaojun Wei, Leibo Liu:
An energy-efficient dynamically reconfigurable cryptographic engine with improved power/EM-side-channel-attack resistance. Sci. China Inf. Sci. 65(4) (2022) - [j10]Zongsheng Hou, Neng Zhang, Bohan Yang, Hanning Wang, Min Zhu, Shouyi Yin, Shaojun Wei, Leibo Liu:
Efficient FHE Radix-2 Arithmetic Operations Based on Redundant Encoding. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(7): 2024-2037 (2022) - [j9]Xiangren Chen, Bohan Yang, Shouyi Yin, Shaojun Wei, Leibo Liu:
CFNTT: Scalable Radix-2/4 NTT Multiplication Architecture with an Efficient Conflict-free Memory Mapping Scheme. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2022(1): 94-126 (2022) - [j8]Cankun Zhao, Neng Zhang, Hanning Wang, Bohan Yang, Wenping Zhu, Zhengdong Li, Min Zhu, Shouyi Yin, Shaojun Wei, Leibo Liu:
A Compact and High-Performance Hardware Architecture for CRYSTALS-Dilithium. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2022(1): 270-295 (2022) - [c28]Xiangren Chen, Bohan Yang, Yong Lu, Shouyi Yin, Shaojun Wei, Leibo Liu:
Efficient access scheme for multi-bank based NTT architecture through conflict graph. DAC 2022: 91-96 - [c27]Mingyuan Yang, Yemeng Zhang, Bohan Yang, Hanning Wang, Shouyi Yin, Shaojun Wei, Leibo Liu:
A SHA-512 Hardware Implementation Based on Block RAM Storage Structure. IPDPS Workshops 2022: 132-135 - 2021
- [j7]Neng Zhang, Qiao Qin, Zongsheng Hou, Bohan Yang, Shouyi Yin, Shaojun Wei, Leibo Liu:
Efficient Comparison and Addition for FHE With Weighted Computational Complexity Model. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(9): 1896-1908 (2021) - [j6]Yihong Zhu, Min Zhu, Bohan Yang, Wenping Zhu, Chenchen Deng, Chen Chen, Shaojun Wei, Leibo Liu:
LWRpro: An Energy-Efficient Configurable Crypto-Processor for Module-LWR. IEEE Trans. Circuits Syst. I Regul. Pap. 68(3): 1146-1159 (2021) - 2020
- [j5]Danilo Sijacic, Josep Balasch, Bohan Yang, Santosh Ghosh, Ingrid Verbauwhede:
Towards efficient and automated side-channel evaluations at design time. J. Cryptogr. Eng. 10(4): 305-319 (2020) - [j4]Neng Zhang, Bohan Yang, Chen Chen, Shouyi Yin, Shaojun Wei, Leibo Liu:
Highly Efficient Architecture of NewHope-NIST on FPGA using Low-Complexity NTT/INTT. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2020(2): 49-72 (2020) - [i3]Yihong Zhu, Min Zhu, Bohan Yang, Wenping Zhu, Chenchen Deng, Chen Chen, Shaojun Wei, Leibo Liu:
A High-performance Hardware Implementation of Saber Based on Karatsuba Algorithm. IACR Cryptol. ePrint Arch. 2020: 1037 (2020)
2010 – 2019
- 2018
- [j3]Bohan Yang, Vladimir Rozic, Milos Grujic, Nele Mentens, Ingrid Verbauwhede:
ES-TRNG: A High-throughput, Low-area True Random Number Generator based on Edge Sampling. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2018(3): 267-292 (2018) - [c26]Danilo Sijacic, Josep Balasch, Bohan Yang, Santosh Ghosh, Ingrid Verbauwhede:
Towards Efficient and Automated Side Channel Evaluations at Design Time. PROOFS 2018: 16-31 - [c25]Eduard Marin, Dave Singelée, Bohan Yang, Vladimir Volskiy, Guy A. E. Vandenbosch, Bart Nuttin, Bart Preneel:
Securing Wireless Neurostimulators. CODASPY 2018: 287-298 - [c24]Milos Grujic, Bohan Yang, Vladimir Rozic, Ingrid Verbauwhede:
Towards inter-vendor compatibility of true random number generators for FPGAs. DATE 2018: 1520-1523 - [c23]Josep Balasch, Florent Bernard, Viktor Fischer, Milos Grujic, Marek Laban, Oto Petura, Vladimir Rozic, Gerard van Battum, Ingrid Verbauwhede, Marnix Wakker, Bohan Yang:
Design and testing methodologies for true random number generators towards industry certification. ETS 2018: 1-10 - [c22]Maxime Madau, Michel Agoyan, Josep Balasch, Milos Grujic, Patrick Haddad, Philippe Maurine, Vladimir Rozic, Dave Singelée, Bohan Yang, Ingrid Verbauwhede:
The Impact of Pulsed Electromagnetic Fault Injection on True Random Number Generators. FDTC 2018: 43-48 - [c21]Milos Grujic, Vladimir Rozic, Bohan Yang, Ingrid Verbauwhede:
A Closer Look at the Delay-Chain based TRNG. ISCAS 2018: 1-5 - 2017
- [j2]Milos Grujic, Vladimir Rozic, Bohan Yang, Ingrid Verbauwhede:
Lightweight Prediction-Based Tests for On-Line Min-Entropy Estimation. IEEE Embed. Syst. Lett. 9(2): 45-48 (2017) - [c20]Bohan Yang, Vladimir Rozic, Milos Grujic, Nele Mentens, Ingrid Verbauwhede:
On-chip jitter measurement for true random number generators. AsianHOST 2017: 91-96 - [c19]Tomer Ashur, Jeroen Delvaux, Sanghan Lee, Pieter Maene, Eduard Marin, Svetla Nikova, Oscar Reparaz, Vladimir Rozic, Dave Singelée, Bohan Yang, Bart Preneel:
A Privacy-Preserving Device Tracking System Using a Low-Power Wide-Area Network. CANS 2017: 347-369 - [c18]Stjepan Picek, Luca Mariot, Bohan Yang, Domagoj Jakobovic, Nele Mentens:
Design of S-boxes Defined with Cellular Automata Rules. Conf. Computing Frontiers 2017: 409-414 - [c17]Vladimir Rozic, Bohan Yang, Jo Vliegen, Nele Mentens, Ingrid Verbauwhede:
The Monte Carlo PUF. FPL 2017: 1-6 - 2016
- [c16]Stjepan Picek, Dominik Sisejkovic, Domagoj Jakobovic, Lejla Batina, Bohan Yang, Danilo Sijacic, Nele Mentens:
Extreme Pipelining Towards the Best Area-Performance Trade-Off in Hardware. AFRICACRYPT 2016: 147-166 - [c15]Stjepan Picek, Bohan Yang, Vladimir Rozic, Jo Vliegen, Jori Winderickx, Thomas De Cnudde, Nele Mentens:
PRNGs for Masking Applications and Their Mapping to Evolvable Hardware. CARDIS 2016: 209-227 - [c14]Eduard Marin, Dave Singelée, Bohan Yang, Ingrid Verbauwhede, Bart Preneel:
On the Feasibility of Cryptography for a Wireless Insulin Pump System. CODASPY 2016: 113-120 - [c13]Bohan Yang, Vladimir Rozic, Nele Mentens, Wim Dehaene, Ingrid Verbauwhede:
TOTAL: TRNG on-the-fly testing for attack detection using Lightweight hardware. DATE 2016: 127-132 - [c12]Ruan de Clercq, Ronald De Keulenaer, Bart Coppens, Bohan Yang, Pieter Maene, Koen De Bosschere, Bart Preneel, Bjorn De Sutter, Ingrid Verbauwhede:
SOFIA: Software and control flow integrity architecture. DATE 2016: 1172-1177 - [c11]Erik Jan Marinissen, Yervant Zorian, Mario Konijnenburg, Chih-Tsun Huang, Ping-Hsuan Hsieh, Peter Cockburn, Jeroen Delvaux, Vladimir Rozic, Bohan Yang, Dave Singelée, Ingrid Verbauwhede, Cedric Mayor, Robert Van Rijsinge, Cocoy Reyes:
IoT: Source of test challenges. ETS 2016: 1-10 - [c10]Vladimir Rozic, Bohan Yang, Wim Dehaene, Ingrid Verbauwhede:
Iterating Von Neumann's post-processing under hardware constraints. HOST 2016: 37-42 - [c9]Yang Cao, Vladimir Rozic, Bohan Yang, Josep Balasch, Ingrid Verbauwhede:
Exploring active manipulation attacks on the TERO random number generator. MWSCAS 2016: 1-4 - [c8]Stjepan Picek, Dominik Sisejkovic, Vladimir Rozic, Bohan Yang, Domagoj Jakobovic, Nele Mentens:
Evolving Cryptographic Pseudorandom Number Generators. PPSN 2016: 613-622 - [c7]Stjepan Picek, Bohan Yang, Vladimir Rozic, Nele Mentens:
On the Construction of Hardware-Friendly 4\times 4 and 5\times 5 S-Boxes. SAC 2016: 161-179 - [c6]Danilo Sijacic, Andreas B. Kidmose, Bohan Yang, Subhadeep Banik, Begül Bilgin, Andrey Bogdanov, Ingrid Verbauwhede:
Hold Your Breath, PRIMATEs Are Lightweight. SAC 2016: 197-216 - [c5]Stjepan Picek, Bohan Yang, Nele Mentens:
A Search Strategy to Optimize the Affine Variant Properties of S-Boxes. WAIFI 2016: 208-223 - [i2]Vladimir Rozic, Bohan Yang, Nele Mentens, Ingrid Verbauwhede:
Canary Numbers: Design for Light-weight Online Testability of True Random Number Generators. IACR Cryptol. ePrint Arch. 2016: 386 (2016) - 2015
- [j1]Wentao Zhang, Zhenzhen Bao, Dongdai Lin, Vincent Rijmen, Bohan Yang, Ingrid Verbauwhede:
RECTANGLE: a bit-slice lightweight block cipher suitable for multiple platforms. Sci. China Inf. Sci. 58(12): 1-15 (2015) - [c4]Vladimir Rozic, Bohan Yang, Wim Dehaene, Ingrid Verbauwhede:
Highly efficient entropy extraction for true random number generators on FPGAs. DAC 2015: 116:1-116:6 - [c3]Bohan Yang, Vladimir Rozic, Nele Mentens, Wim Dehaene, Ingrid Verbauwhede:
Embedded HW/SW platform for on-the-fly testing of true random number generators. DATE 2015: 345-350 - [c2]Ricardo Chaves, Giorgio Di Natale, Lejla Batina, Shivam Bhasin, Baris Ege, Apostolos P. Fournaris, Nele Mentens, Stjepan Picek, Francesco Regazzoni, Vladimir Rozic, Nicolas Sklavos, Bohan Yang:
Challenges in designing trustworthy cryptographic co-processors. ISCAS 2015: 2009-2012 - [c1]Bohan Yang, Vladimir Rozic, Nele Mentens, Ingrid Verbauwhede:
On-the-fly tests for non-ideal true random number generators. ISCAS 2015: 2017-2020 - 2014
- [i1]Wentao Zhang, Zhenzhen Bao, Dongdai Lin, Vincent Rijmen, Bohan Yang, Ingrid Verbauwhede:
RECTANGLE: A Bit-slice Ultra-Lightweight Block Cipher Suitable for Multiple Platforms. IACR Cryptol. ePrint Arch. 2014: 84 (2014)
Coauthor Index
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last updated on 2024-10-31 21:11 CET by the dblp team
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