default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDPer Larsson-Edefors
- > Home > Persons > Per Larsson-Edefors
Publications
- 2009
[c42]Patrik Kimfors, Niklas Broman, Andreas Haraldsson, Kasyab P. Subramaniyan, Magnus Själander
, Henrik Eriksson, Per Larsson-Edefors:
Custom layout strategy for rectangle-shaped log-depth multiplier reduction tree. ICECS 2009: 77-80- 2006
- [j3]Henrik Eriksson, Per Larsson-Edefors, Daniel Eckerbert:
Toward architecture-based test-vector generation for timing verification of fast parallel multipliers. IEEE Trans. Very Large Scale Integr. Syst. 14(4): 370-379 (2006) - [c29]Henrik Eriksson, Per Larsson-Edefors, Mary Sheeran, Magnus Själander, Daniel Johansson, Martin Scholin:
Multiplier reduction tree with logarithmic logic depth and regular connectivity. ISCAS 2006 - 2005
- [c26]Magnus Själander, Mindaugas Drazdziulis, Per Larsson-Edefors, Henrik Eriksson:
A low-leakage twin-precision multiplier using reconfigurable power gating. ISCAS (2) 2005: 1654-1657 - 2004
- [c25]Mindaugas Draidiiulis, Per Larsson-Edefors, Daniel Eckerbert, Henrik Eriksson:
A power cut-off technique for gate leakage suppression [CMOS logic circuits]. ESSCIRC 2004: 171-174 - [c24]Magnus Själander, Henrik Eriksson, Per Larsson-Edefors:
An Efficient Twin-Precision Multiplier. ICCD 2004: 30-33 - [c23]Henrik Eriksson, Per Larsson-Edefors:
Glitch-conscious low-power design of arithmetic circuits. ISCAS (2) 2004: 281-284 - [c22]Henrik Eriksson, Per Larsson-Edefors:
Dynamic pass-transistor dot operators for efficient parallel-prefix adders. ISCAS (2) 2004: 461-464 - 2003
- [c16]Henrik Eriksson, Per Larsson-Edefors, Tomas Henriksson, Christer Svensson:
Full-custom vs. standard-cell design flow: an adder case study. ASP-DAC 2003: 507-510 - [c12]Per Larsson-Edefors, Daniel Eckerbert, Henrik Eriksson, Lars J. Svensson:
Dual Threshold Voltage Circuits in the Presence of Resistive Interconnects. ISVLSI 2003: 225-230 - 2001
- [c10]Tomas Henriksson, Henrik Eriksson, Ulf Nordqvist, Per Larsson-Edefors, Dake Liu:
VLSI implementation of CRC-32 for 10 Gigabit Ethernet. ICECS 2001: 1215-1218 - [c9]Henrik Eriksson, Per Larsson-Edefors, Atila Alvandpour:
A 2.8 ns 30 uW/MHz area-efficient 32-b Manchester carry-bypass adder. ISCAS (4) 2001: 84-87 - [c8]Henrik Eriksson, Per Larsson-Edefors, William P. Marnane:
A regular parallel multiplier which utilizes multiple carry-propagate adders. ISCAS (4) 2001: 166-169 - 2000
- [c5]Daniel Eckerbert, Henrik Eriksson, Per Larsson-Edefors, Anders Edman:
An interconnect-driven design of a DFT processor. ISCAS 2000: 569-572 - [c4]Henrik Eriksson, Per Larsson-Edefors:
Impact of Voltage Scaling on Glitch Power Consumption. PATMOS 2000: 139-148
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-06-12 21:59 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
