ITC 1982:
Philadelphia, PA, USASession 1:
Invited Speekers
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Luis T. Burke Jr. :
Maintaing Quality, Poductivity and Profit in a Changing Bell System.
4-5
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Matthew V. Mahoney :
Closing the Loop: An Expanding Role for ATE in Semiconductor Manufacturing.
12-23
Session 2:
Fault Modeling and Test Effectiveness Evaluation for VLSI Circuits
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Peter S. Bottorff :
Fault Modeling and Test Effectiveness Evaluation for VLSI Circuits.
24
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Session 3:
Design for Testability
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Mark G. Karpovsky :
Universal Tests Detecting Input/Output Faults in Almost All Devices.
52-57
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William C. Carter :
Signature Testing with Guaranteed Bounds for Fault Coverage.
75-82
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Session 4:
Test Equipment and Methods I
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Kennteth F. Coop :
Automated Test Instrumentation for Low-Current Testing.
119-125
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K. S. Bhaskar :
Signature Analysis: Yet Another Perspective.
132-139
Panel Session 7:
Professional Aspects of Test Engineering
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John Turino :
Professional Aspects of Test Engineering.
140-141
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Session 8:
ATPG and Simulation Systems-The State of the Art.
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Harold Levin :
ATPG and Simulation Systems : The State of the Art.
146
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Kenneth R. Bowden :
Design Goals and Implementation Techniques for Time-Based Digital Simulation and Hazard Detection.
147-152
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John P. Barlow :
A New Software Tool for Detecting Problems Caused by Inductively-Generated Switching Noise.
166-169
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James Y. O. Fong :
On Functional Controllability and Observability Analysis.
170-175
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Session 9:
Self-Test:
Chip Level to System Level Approaches
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Patrick P. Fasang :
A Fault Detection and Isolation Technique for Microcomputers.
214-222
Session 10:
Memory-Test-An International Art
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Marian Marinescu :
Simple and Efficient Algorithms for Functional RAM Testing.
236-239
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Nik Kirschner :
An Interactive Descrambler Program for RAMs with Redundancy.
252-257
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Charles E. Shalvoy :
Testing during Burn-In: Economical Alternative for Testing Memories.
258-261
Session 11:
Quality and Reliability
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Louis J. Sobotka :
The Effects of Backdriving Digital Integrated Circuits during In-Circuit Testing.
269-286
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G. Eugene Gottlieb :
An Accelerated Testing Technique for Plastic Package Devices Using a Sequential Combination of Pressure Cooker and 85/85 (PCTH).
287-298
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Session 12:
Test Data Analysis Closes the Production Loop
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W. L. Goldie ,
P. F. Macready :
An Automatic Test Equipment Database System Used in the Generation and Analysis of Fault Statistics at the Printed Circuit Board Level.
350-361
Session 13:
Testability Measurement and Enhancement
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Session 14:
Systems Tools
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Ken Fedraw :
9826A Computer Burn-In Program.
409-413
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Donald Komonytsky :
LSI Self-Test Using Level Sensitive Scan Design and Signature Analysis.
414-424
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Session 15:
Computer Enhanced Analog Test Techniques
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David C. Cheng :
A Precision Measurement Technique for High Frequency Repetitive Signals.
428-434
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K. Uchida :
Testing the Dynamic Performance of High-Speed A/D Converters.
435-440
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Stephen W. Bryson :
Testing an Audio Spectrum Analyzer for Speech Recognition Systems.
441-446
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Tim Higgins :
Digital Signal Processing for Production Testing of Analog LSI Devices.
447-457
Session 16:
VLSI/MicroprocessorTests-Making Micrprocessors More Testable
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Bell Liu :
Soft Failure Detection and Correction in Microprocessor Characterization.
458-460
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Masood Namjoo :
Techniques for Concurrent Testing of VLSI Processor Operation.
461-468
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Session 17:
Test Software
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Session 18:
Board Testing I
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Matthew L. Fichtenbaum :
Faults Which Challenge the In-Circuit Tester: Some Examples and Some Solutions.
530-536
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Session 19:
Test Economics
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Donald Stewart :
Improving the Effectiveness of Board Test Programmers.
565-568
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Session 20:
VLSI/Microprocessor Tests-New Approaches
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Roderick H. Macmillan ,
M. R. Bentley :
, An Efficient Test Vector Generation and Reduction Method for an LSI Digital Filter Circuit Using an Adaptive Search Technique.
601-607
Session 21:
Test Equipment and Methods II
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Session 22:
Board Testing II
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James J. Faran Jr. :
Methods of Assignment of Nodes to Pins for Multiplexed Testers.
641-647
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