CAMP 2000: Padova, Italy
Fifth International Workshop on Computer Architectures for Machine Perception (CAMP 2000), September 11-13, 2000, Padova, Italy. IEEE Computer Society 2000- Message from the Chairpersons.
- Conference Organizers.
- Referees.
- Author Index.
Vision Systems
- A. Chihoub, Y. J. Bai, Visvanathan Ramesh: An Imaging Library for a TriCore Based Digital Camera. 3-11
- Dietrich Paulus, Christopher Drexler, Michael Reinhold, Matthias Zobel, Joachim Denzler: Active Computer Vision System. 18-
VLSI Architectures
- Gooitzen S. van der Wal, Michael W. Hansen, Michael R. Piacentino: The Acadia Vision Processor. 31-40
- Idaku Ishii, Takashi Komuro, Masatoshi Ishikawa: Method of Moment Calculation for a Digital Vision Chip System. 41-48
- Takashi Komuro, Idaku Ishii, Masatoshi Ishikawa, Atsushi Yoshida: High Speed Target Tracking Vision Chip. 49-56
Invited Lecture
- Pieter Jonker, Jie Han: On Quantum and Classical Computing with Arrays of Superconducting Persistent Current Qubits. 69-
Neural Networks
- Virginio Cantoni, Alfredo Petrosino: 2-D Object Recognition by Structured Neural Networks in a Pyramidal Architecture. 81-86
- Bimal Gisutham, Thambipillai Srikanthan, Vijayan K. Asari: A High Speed Flat CORDIC Based Neuron with Multi-Level Activation Function for Robust Pattern Recognition. 87-94
- Didier Dulac, Gilles Bertrand, Saloua Guezguez: Parallel Segmentation Based on Topology with the Associative Net Model. 95-
Poster Session
- George A. Rovithakis, Michail Maniadakis, Michalis E. Zervakis: A Genetically Optimized Artificial Neural Network Structure for Feature Extraction and Classification of Vascular Tissue Fluorescence Spectrums. 107-111
- Cesar Torres-Huitzil, Miguel Arias-Estrada: An FPGA Architecture for High Speed Edge and Corner Detection. 112-116
- Silvio P. Sabatini, Paolo Cavalleri, Fabio Solari, Giacomo M. Bisio: Recovering 3-D Egomotion Parameters from Optic Flow: From Structural Principles to Analog Architectures. 117-121
- Fernando Pardo, I. Llorens, F. Mico, Jose Antonio Boluda: Space Variant Vision and Pipelined Architecture for Time to Impact Computation. 122-126
- Samir Bouaziz, M. Fan, Roger Reynaud, T. Maurin: Multi-Sensors and Environment Simulator for Collision Avoidance Applications. 127-130
- François Verdier, Alain Mérigot, Bertrand Zavidovique: Fast Stable Matching Algorithm using Asynchronous Parallel Programming Model. 131-135
- Maria Grazia Albanesi, Alessandro Giancane: Fast Retrieval on Compressed Images for Internet Applications. 136-141
- Roberto A. Reyna, Daniel Esteve, Dominique Houzet, Marie-France Albenge: Implementation of the SVM Neural Network Generalization Function for Image Processing. 147-
Architectures
- M. Aberbour, Habib Mehrez, François Durbin, Jacques Haussy, P. Lalande, André Tissot: A System-On-A-Chip for Pattern Recognition Architecture and Design Methodology. 155-162
- Giuseppe Coldani, L. Cotrino, Giovanni Danese, Francesco Leporati, M. Maneri: Notacheck: A Parallel DSP-Based Architecture for Real Time High Resolution Inspection of Bank-Notes. 163
- Nuno Roma, Leonel Sousa: In the Development and Evaluation of Specialized Processors for Computing High-Order 2-D Image Moments in Real-Time. 170
Distributed systems
- Vito Di Gesù, Biagio Lenzitti, Giosuè Lo Bosco, Domenico Tegolo: A Distributed Architecture for Autonomous Navigation of Robots. 190-194
- José Luis Bosque, Oscar David Robles, Angel Rodríguez, Luis Pastor: Study of a Parallel CBIR Implementation using MPI. 195-204
- Daisaku Arita, Satoshi Yonemoto, Rin-ichiro Taniguchi: Real-Time Computer Vision on PC-Cluster and Its Application to Real-Time Motion Capture. 205-
Configurable Computing
- Nalini K. Ratha, Anil K. Jain, Diane T. Rover: FPGA-Based Coprocessor for Text String Extraction. 217-221
- Bruce A. Draper, Walid A. Najjar, A. P. Wim Böhm, Jeffrey Hammes, Robert Rinker, Charlie Ross, Monica Chawathe, José Bins: Compiling and Optimizing Image Processing Algorithms for FPGAs. 222-231
- Sebastien Vagnier, Hassane Essafi, Alain Mérigot: A Configurable Processor Network for Document Management. 232-239
- Didier Demigny, Lounis Kessal, R. Bourguiba, N. Boudouani: How to Use High Speed Reconfigurable FPGA for Real Time Image Processing? 240-
Invited lecture
- Marco Ferretti: Multi-Media Extensions in Super-Pipelined Micro-Architectures. A New Case for SIMD Processing? 249-
Programming Environments
- Nicola Zingirian, Massimo Maresca: Loop Regularization for Image and Video Processing on Instruction Level Parallel Architectures. 261-269
- Eric Senn, Bertrand Zavidovique: Examples of Image Processing to Benefit from an Asynchronous Implementation. 270-279
- Bertrand Ducourthial, Alain Mérigot, Nicolas Sicard: Anet: A Programming Environment for Parallel Image Analysis. 280-
Hardware Supported Techniques
- Martin C. Herbordt, Jade Cravy, Honghai Zhang, Calvin Lin, Hong Rao: An Array Control Unit for High Performance SIMD Arrays. 293-301
- Gianni Conte, Stefano Tommesani, Francesco Zanichelli: The Long And Winding Road to High-Performance Image Processing with MMX/SSE. 302-310
- Rita Cucchiara, Massimo Piccardi, Andrea Prati: Hardware Prefetching Techniques for Cache Memories in Multimedia Applications. 311-319
- Andrzej Sluzek: Hardware Supported Technique for Detecting Multi-Corners In Digital Contours. 320-
Algorithms and Applications
- Toshikazu Wada, Xiaojun Wu, Shogo Tokai, Takashi Matsuyama: Homography Based Parallel Volume Intersection: Toward Real-Time Volume Reconstruction using Active Cameras. 331-339
- Luigi Cinque, Stefano Levialdi, Luca Lombardi, Steven L. Tanimoto: Handling Artifacts in Digitally Reproduced Documents. 340-346
- Luigi di Stefano, Stefano Mattoccia: Fast Stereo Matching for the VIDET System using a General Purpose Processor with Multimedia Extensions. 356-
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