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Publication search results
found 42 matches
- 2013
- Jian Sun, Yinghai Lu, Hai Zhou, Changhao Yan, Xuan Zeng:
Post-routing layer assignment for double patterning with timing critical paths consideration. Integr. 46(2): 153-164 (2013) - Ameer Abdelhadi, Ran Ginosar, Avinoam Kolodny, Eby G. Friedman:
Timing-driven variation-aware synthesis of hybrid mesh/tree clock distribution networks. Integr. 46(4): 382-391 (2013) - Nabihah Ahmad, S. M. Rezaul Hasan:
Low-power compact composite field AES S-Box/Inv S-Box design in 65 nm CMOS using Novel XOR Gate. Integr. 46(4): 333-344 (2013) - Antara Ain, Subhankar Mukherjee, Pallab Dasgupta, Siddhartha Mukhopadhyay:
Post-silicon debugging of PMU integration errors using behavioral models. Integr. 46(3): 310-321 (2013) - Alberto A. Del Barrio, Seda Ogrenci Memik, María C. Molina, José M. Mendías, Román Hermida:
A fragmentation aware High-Level Synthesis flow for low power heterogenous datapaths. Integr. 46(2): 119-130 (2013) - Sina Basir-Kazeruni, Hao Yu, Fang Gong, Yu Hu, Chunchen Liu, Lei He:
SPECO: Stochastic Perturbation based Clock tree Optimization considering temperature uncertainty. Integr. 46(1): 22-32 (2013) - Kanad Basu, Chetan Murthy, Prabhat Mishra:
Bitmask aware compression of NISC control words. Integr. 46(2): 131-141 (2013) - Sophie Belloeil-Dupuis, Roselyne Chotin-Avot, Habib Mehrez:
Exploring redundant arithmetics in computer-aided design of arithmetic datapaths. Integr. 46(2): 104-118 (2013) - Zhi-Wei Chen, Jin-Tai Yan:
Routability-constrained multi-bit flip-flop construction for clock power reduction. Integr. 46(3): 290-300 (2013) - David Cuesta, José Luis Risco-Martín, José L. Ayala, José Ignacio Hidalgo:
3D thermal-aware floorplanner using a MOEA approximation. Integr. 46(1): 10-21 (2013) - Samiran Dam, Pradip Mandal:
Modeling and design of CMOS analog circuits through hierarchical abstraction. Integr. 46(4): 449-462 (2013) - Shirshendu Das, Parasara Sridhar Duggirala, Hemangee K. Kapoor:
A formal framework for interfacing mixed-timing systems. Integr. 46(3): 255-264 (2013) - Majdi Elhaji, Abdelkrim Zitouni, Samy Meftali, Jean-Luc Dekeyser, Rached Tourki:
A low-power oriented architecture for H.264 variable block size motion estimation based on a resource sharing scheme. Integr. 46(4): 404-412 (2013) - Marcos Santana Farias, Nadia Nedjah, Luiza de Macedo Mourelle:
Hardware implementation of subtractive clustering for radionuclide identification. Integr. 46(3): 220-229 (2013) - Carlos González, Sergio Sánchez, Abel Paz, Javier Resano, Daniel Mozos, Antonio Plaza:
Use of FPGA or GPU-based architectures for remotely sensed hyperspectral image processing. Integr. 46(2): 89-103 (2013) - Zhigang Hao, Sheldon X.-D. Tan, Guoyong Shi:
Statistical full-chip total power estimation considering spatially correlated process variations. Integr. 46(1): 80-88 (2013) - José Luis Imaña, Román Hermida, Francisco Tirado:
Low complexity bit-parallel polynomial basis multipliers over binary fields for special irreducible pentanomials. Integr. 46(2): 197-210 (2013) - Ramy Iskander, Marie-Minerve Louërat, Andreas Kaiser:
Hierarchical sizing and biasing of analog firm intellectual properties. Integr. 46(2): 172-188 (2013) - Jiangpeng Li, Jun Ma, Guanghui He:
A memory efficient parallel layered QC-LDPC decoder for CMMB systems. Integr. 46(4): 359-368 (2013) - Zuowei Li, Yuchun Ma, Qiang Zhou, Yici Cai, Yuan Xie, Tingting Huang:
Thermal-aware P/G TSV planning for IR drop reduction in 3D ICs. Integr. 46(1): 1-9 (2013) - Enrique López-Morillo, Fernando Muñoz, Antonio Torralba, Fernando J. Marquez, I. Rebollo, José Ramón García Oya:
Compact low-power implementation for continuous-time ΣΔ modulators. Integr. 46(4): 441-448 (2013) - Chao-Hung Lu, Hung-Ming Chen, Chien-Nan Jimmy Liu, Wen-Yu Shih:
Package routability- and IR-drop-aware finger/pad planning for single chip and stacking IC designs. Integr. 46(3): 280-289 (2013) - Arash Azizi Mazreah, Mohammad T. Manzuri Shalmani:
Low-leakage soft error tolerant port-less configuration memory cells for FPGAs. Integr. 46(4): 413-426 (2013) - Farshad Moradi, Tuan Vu Cao, Elena I. Vatajelu, Ali Peiravi, Hamid Mahmoodi, Dag T. Wisland:
Domino logic designs for high-performance and leakage-tolerant applications. Integr. 46(3): 247-254 (2013) - Nadia Nedjah, Luiza de Macedo Mourelle:
Hardware for bioinformatics applications. Integr. 46(3): 219 (2013) - Aliakbar Niknafs, Majid Mohammadi:
Synthesis and optimization of multiple-valued combinational and sequential reversible circuits with don't cares. Integr. 46(2): 189-196 (2013) - Agathoklis Papadopoulos, Ioannis Kirmitzoglou, Vasilis J. Promponas, Theocharis Theocharides:
FPGA-based hardware acceleration for local complexity analysis of massive genomic data. Integr. 46(3): 230-239 (2013) - Hanhua Qian, Chip-Hong Chang, Hao Yu:
An efficient channel clustering and flow rate allocation algorithm for non-uniform microfluidic cooling of 3D integrated circuits. Integr. 46(1): 57-68 (2013) - Sherief Reda, Abdullah Nazma Nowroz, Ryan Cochran, Stefan Angelevski:
Post-silicon power mapping techniques for integrated circuits. Integr. 46(1): 69-79 (2013) - Alireza Saberkari, Eduard Alarcón, Shahriar B. Shokouhi:
Fast transient current-steering CMOS LDO regulator based on current feedback amplifier. Integr. 46(2): 165-171 (2013)
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