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Publication search results
found 178 matches
- 2017
- Christoph Grimm, Michael Rathmair:
Dealing with Uncertainties in Analog/Mixed-Signal Systems: Invited. DAC 2017: 35:1-35:6 - Jian Kuang, Evangeline F. Y. Young:
Fixed-Parameter Tractable Algorithms for Optimal Layout Decomposition and Beyond. DAC 2017: 61:1-61:6 - Lei Yang, Weichen Liu, Peng Chen, Nan Guan, Mengquan Li:
Task Mapping on SMART NoC: Contention Matters, Not the Distance. DAC 2017: 88:1-88:6 - Ankur Agrawal, Chia-Yu Chen, Jungwook Choi, Kailash Gopalakrishnan, Jinwook Oh, Sunil Shukla, Viji Srinivasan, Swagath Venkataramani, Wei Zhang:
Accelerator Design for Deep Learning Training: Extended Abstract: Invited. DAC 2017: 57:1-57:2 - Mohamad Baker Alawieh, Fa Wang, Xin Li:
Efficient Hierarchical Performance Modeling for Integrated Circuits via Bayesian Co-Learning. DAC 2017: 9:1-9:6 - Sergi Alcaide, Carles Hernández, Antoni Roca, Jaume Abella:
DIMP: A Low-Cost Diversity Metric Based on Circuit Path Analysis. DAC 2017: 45:1-45:6 - Alric Althoff, Ryan Kastner:
An Architecture for Learning Stream Distributions with Application to RNG Testing. DAC 2017: 15:1-15:6 - Hussam Amrouch, Behnam Khaleghi, Andreas Gerstlauer, Jörg Henkel:
Towards Aging-Induced Approximations. DAC 2017: 41:1-41:6 - Edward Andert, Mohammad Khayatian, Aviral Shrivastava:
Crossroads: Time-Sensitive Autonomous Intersection Management Technique. DAC 2017: 50:1-50:6 - Aayush Ankit, Abhronil Sengupta, Priyadarshini Panda, Kaushik Roy:
RESPARC: A Reconfigurable and Energy-Efficient Architecture with Memristive Crossbars for Deep Spiking Neural Networks. DAC 2017: 27:1-27:6 - Muhammad Kamran Ayub, Osman Hasan, Muhammad Shafique:
Statistical Error Analysis for Low Power Approximate Adders. DAC 2017: 75:1-75:6 - Martin Barnasconi, Sumit Adhikari:
ESL Design in SystemC AMS: Introducing a top-down design methodology for mixed-signal systems: Invited. DAC 2017: 34:1-34:5 - Andrew Becker, Wei Hu, Yu Tai, Philip Brisk, Ryan Kastner, Paolo Ienne:
Arbitrary Precision and Complexity Tradeoffs for Gate-Level Information Flow Tracking. DAC 2017: 5:1-5:6 - Song Bian, Michihiro Shintani, Masayuki Hiromoto, Takashi Sato:
LSTA: Learning-Based Static Timing Analysis for High-Dimensional Correlated On-Chip Variations. DAC 2017: 66:1-66:6 - Kai Bittner, Hans Georg Brachtendorf, Wim Schoenmaker, Pascal Reynier:
Coupled circuit/EM simulation for radio frequency circuits. DAC 2017: 10:1-10:6 - Nicola Bombieri, Federico Busato, Franco Fummi:
Power-aware Performance Tuning of GPU Applications Through Microbenchmarking. DAC 2017: 66:1-66:6 - Boudewijn Braams, Sebastian Altmeyer, Andy D. Pimentel:
EDiFy: An Execution time Distribution Finder. DAC 2017: 32:1-32:6 - Wei-Chun Chang, Iris Hui-Ru Jiang, Yen-Ting Yu, Wei-Fang Liu:
iClaire: A Fast and General Layout Pattern Classification Algorithm. DAC 2017: 64:1-64:6 - Manish Chauhan, Rodolfo Pellizzoni, Krzysztof Czarnecki:
Modeling the Effects of AUTOSAR Overheads on Application Timing and Schedulability. DAC 2017: 47:1-47:6 - Gengjie Chen, Jian Kuang, Zhiliang Zeng, Hang Zhang, Evangeline F. Y. Young, Bei Yu:
Minimizing Thermal Gradient and Pumping Power in 3D IC Liquid Cooling Network Design. DAC 2017: 70:1-70:6 - Xiaoming Chen, Jianxu Chen, Danny Z. Chen, Xiaobo Sharon Hu:
Optimizing Memory Efficiency for Convolution Kernels on Kepler GPUs. DAC 2017: 68:1-68:6 - Tseng-Yi Chen, Yuan-Hao Chang, Shuo-Han Chen, Chih-Ching Kuo, Ming-Chang Yang, Hsin-Wen Wei, Wei-Kuan Shih:
Enabling Write-Reduction Strategy for Journaling File Systems over Byte-addressable NVRAM. DAC 2017: 44:1-44:6 - Tseng-Yi Chen, Yuan-Hao Chang, Yuan-Hung Kuan, Yu-Ming Chang:
VirtualGC: Enabling Erase-free Garbage Collection to Upgrade the Performance of Rewritable SLC NAND Flash Memory. DAC 2017: 25:1-25:6 - Shuo-Han Chen, Yen-Ting Chen, Hsin-Wen Wei, Wei-Kuan Shih:
Boosting the Performance of 3D Charge Trap NAND Flash with Asymmetric Feature Process Size Characteristic. DAC 2017: 83:1-83:6 - Kuan-Jung Chen, Yu-Kai Chuang, Bo-Yi Yu, Shao-Yun Fang:
Minimizing Cluster Number with Clip Shifting in Hotspot Pattern Classification. DAC 2017: 63:1-63:6 - Ren Chen, Viktor K. Prasanna:
Optimal Circuits for Parallel Bit Reversal. DAC 2017: 73:1-73:6 - Jianli Chen, Ziran Zhu, Wenxing Zhu, Yao-Wen Chang:
Toward Optimal Legalization for Mixed-Cell-Height Circuit Designs. DAC 2017: 52:1-52:6 - Ming Cheng, Lixue Xia, Zhenhua Zhu, Yi Cai, Yuan Xie, Yu Wang, Huazhong Yang:
TIME: A Training-in-memory Architecture for Memristor-based Deep Neural Networks. DAC 2017: 26:1-26:6 - Wei-Lun Chiu, Iris Hui-Ru Jiang, Chien-Pang Lu, Yu-Tung Chang:
Power and Area Efficient Hold Time Fixing by Free Metal Segment Allocation. DAC 2017: 64:1-64:6 - Yeongpil Cho, Donghyun Kwon, Yunheung Paek:
Instruction-Level Data Isolation for the Kernel on ARM. DAC 2017: 26:1-26:6
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