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Publication search results
found 45 matches
- 2013
- Madhusoodan Agrawal, Alpana Agarwal:
A Combined CMOS Reference Circuit with Supply and Temperature Compensation. VDAT 2013: 177-184 - Sachin Agrawal, Sunil Kumar Pandey, Jawar Singh
, Pravin Neminath Kondekar:
An Efficient RF Energy Harvester with Tuned Matching Circuit. VDAT 2013: 138-145 - Chidambaram Alagappan, Vishwani D. Agrawal:
Defect Diagnosis of Digital Circuits Using Surrogate Faults. VDAT 2013: 376-386 - Akhtar W. Alam, Esakkimuthu Dhakshinamoorthy, Prince Mathew, Narender Ponna:
A Novel Input Capacitance Modeling Methodology for Nano-Scale VLSI Standard Cell Library Characterization. VDAT 2013: 44-48 - Mohd Anwar, Syed Azeemuddin
, Mohammed Zafar Ali Khan:
Design and Analysis of a Novel Noise Cancelling Topology for Common Gate UWB LNAs. VDAT 2013: 169-176 - Ratul Kumar Baruah, Roy P. Paily
:
A Dual Material Double-Layer Gate Stack Junctionless Transistor for Enhanced Analog Performance. VDAT 2013: 118-127 - Arani Bhattacharya, Ansuman Banerjee, Susmita Sur-Kolay, Prasenjit Basu, Bhaskar J. Karmakar:
A Cache-Aware Strategy for H.264 Decoding on Multi-processor Architectures. VDAT 2013: 194-203 - Rimpy Bishnoi, Vijay Laxmi
, Manoj Singh Gaur, Mohit Baskota:
Fault Aware Dynamic Adaptive Routing Using LBDR. VDAT 2013: 304-311 - Saima Cherukat, Vineet Sahula
:
Variation Robust Subthreshold SRAM Design with Ultra Low Power Consumption. VDAT 2013: 242-248 - Shirshendu Das, Nagaraju Polavarapu, Prateek D. Halwe, Hemangee K. Kapoor:
Random-LRU: A Replacement Policy for Chip Multiprocessors. VDAT 2013: 204-213 - Sandip Ghosh, Rohit Srivastava:
CPK Based IO AC Timing Closure to Reduce Yield Loss and Test Time. VDAT 2013: 257-266 - Anirban Guha, Shubhajit Roy Chowdhury:
CMOS ASIC Design of a High Performance Digital Fuzzy Processor That Can Compute on Arbitrary Membership Functions. VDAT 2013: 233-241 - Anita Jain, Kavita Khare
:
3D CORDIC Algorithm Based Cartesian to Spherical Coordinate Converter. VDAT 2013: 337-344 - Jose Joseph, Rajendra M. Patrikar
:
Impact of Fin Width and Graded Channel Doping on the Performance of 22nm SOI FinFET. VDAT 2013: 153-159 - Shrirang Korde, Amol Khandare, Raghavendra B. Deshmukh
, Rajendra M. Patrikar
:
Computational Functions' VLSI Implementation for Compressed Sensing. VDAT 2013: 35-43 - Rahul Krishnamurthy, G. K. Sharma:
An Area Efficient Wide Range On-Chip Delay Measurement Architecture. VDAT 2013: 49-58 - Jainender Kumar, Manoj Kumar Majumder
, Brajesh Kumar Kaushik
, Sudeb Dasgupta:
Analysis of Crosstalk Deviation for Bundled MWCNT with Process Induced Height and Width Variations. VDAT 2013: 214-222 - Kai Chi Alex Lam, Mark Zwolinski
:
Circuit Transient Analysis Using State Space Equations. VDAT 2013: 330-336 - R. K. Naga Mahesh, Akash Ganesan, Manchi Pavan Kumar, Roy Paily
:
An Ultra-Wideband Baseband Transmitter Design for Wireless Body Area Network. VDAT 2013: 26-34 - Sachin Maheshwari, Himadri Singh Raghav, Anu Gupta
:
Characterization of Logical Effort for Improved Delay. VDAT 2013: 108-117 - Sachin Maheshwari, Rameez Raza, Pramod Kumar, Anu Gupta
:
Convex Optimization of Energy and Delay Using Logical Effort Method in Deep Sub-micron Technology. VDAT 2013: 185-193 - Kanchan Manna, Shailesh Singh, Santanu Chattopadhyay, Indranil Sengupta:
Preemptive Test Scheduling for Network-on-Chip Using Particle Swarm Optimization. VDAT 2013: 74-82 - Joyati Mondal, Debesh Kumar Das, Dipak Kumar Kole, Hafizur Rahaman
, Bhargab B. Bhattacharya:
On Designing Testable Reversible Circuits Using Gate Duplication. VDAT 2013: 322-329 - Shyamapada Mukherjee, Jibesh Patra
, Suchismita Roy:
Congestion Balancing Global Router. VDAT 2013: 223-232 - Debanjali Nath, Priyanka Choudhury
, Sambhu Nath Pradhan
:
Power Reduction by Integrated Within_Clock_Power Gating and Power Gating (WCPG_in_PG). VDAT 2013: 160-168 - Nupur Navlakha, Lokesh Garg, Dharmendar Boolchandani, Vineet Sahula
:
Architectural Level Sub-threshold Leakage Power Estimation of SRAM Arrays with its Peripherals. VDAT 2013: 312-321 - Cerin Ninan, Chandra Shekhar, M. Radhakrishna:
Design and Optimization of a 2x2 Directional Microstrip Patch Antenna. VDAT 2013: 353-360 - Pankaj Kumar Pal
, Brajesh Kumar Kaushik
, Sudeb Dasgupta:
Optimization of Underlap FinFETs and Its SRAM Performance Projections Using High-k Spacers. VDAT 2013: 267-273 - Somnath Paul, Abhijit Dana, Soumya Pandit:
An Improved g m /I D Methodology for Ultra-Low-Power Nano-Scale CMOS OTA Design. VDAT 2013: 128-137 - Sameer Pawanekar, Kalpesh Kapoor, Gaurav Trivedi:
Kapees: A New Tool for Standard Cell Placement. VDAT 2013: 66-73
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