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ORCIDPriyanka Choudhury
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2010 – 2019
- 2019
[j5]Priyanka Choudhury
, Kanchan Manna, Vivek Rai, Sambhu Nath Pradhan:
Thermal-Aware Partitioning and Encoding of Power-Gated FSM. J. Circuits Syst. Comput. 28(9): 1950144:1-1950144:14 (2019)- 2017
- [j4]Sambhu Nath Pradhan, Priyanka Choudhury, Debanjali Nath:
Transistor level realisation of power gated FSM. Int. J. Comput. Aided Eng. Technol. 9(3): 351-371 (2017) - 2016
- [j3]Debanjali Nath, Priyanka Choudhury, Sambhu Nath Pradhan:
Hybrid Approach of Within-Clock Power Gating and Normal Power Gating to Reduce Power. J. Circuits Syst. Comput. 25(5): 1650044:1-1650044:26 (2016) - 2015
- [c3]Priyanka Choudhury, Debanjali Nath, Vivek Rai, Sambhu Nath Pradhan:
Thermal aware AND-OR-XOR network synthesis. VDAT 2015: 1-6 - 2014
- [j2]Debanjali Nath, Priyanka Choudhury, Abhishek Nag, Sambhu Nath Pradhan:
Power gating architecture implementation inside clock period to reduce power. Int. J. Comput. Aided Eng. Technol. 6(3): 310-323 (2014) - 2013
- [c2]Debanjali Nath, Priyanka Choudhury, Sambhu Nath Pradhan:
Power Reduction by Integrated Within_Clock_Power Gating and Power Gating (WCPG_in_PG). VDAT 2013: 160-168 - 2012
- [j1]Priyanka Choudhury, Sambhu Nath Pradhan:
An Approach for Low Power Design of Power Gated Finite State Machines Considering Partitioning and State Encoding Together. J. Low Power Electron. 8(4): 452-463 (2012) - [c1]Priyanka Choudhury, Sambhu Nath Pradhan:
Power Modeling of Power Gated FSM and Its Low Power Realization by Simultaneous Partitioning and State Encoding Using Genetic Algorithm. VDAT 2012: 19-29
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