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"A Novel Input Capacitance Modeling Methodology for Nano-Scale VLSI ..."

Akhtar W. Alam et al. (2013)

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DOI: 10.1007/978-3-642-42024-5_6

access: closed

type: Conference or Workshop Paper

metadata version: 2023-12-13

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Akhtar W. Alam, Esakkimuthu Dhakshinamoorthy, Prince Mathew, Narender Ponna:
A Novel Input Capacitance Modeling Methodology for Nano-Scale VLSI Standard Cell Library Characterization. VDAT 2013: 44-48

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