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Publication search results
found 37 matches
- 2002
- Ronald D. Barnes, Erik M. Nystrom, Matthew C. Merten, Wen-mei W. Hwu:
Vacuum packing: extracting hardware-detected program phases for post-link optimization. MICRO 2002: 233-244 - K. Basu, Alok N. Choudhary, Jayaprakash Pisharath, Mahmut T. Kandemir:
Power protocol: reducing power dissipation on off-chip data buses. MICRO 2002: 345-355 - Edward Brekelbaum, Jeff Rupley, Chris Wilkerson, Bryan Black:
Hierarchical Scheduling Windows. MICRO 2002: 27-36 - J. Adam Butts, Gurindar S. Sohi:
Characterizing and predicting value degree of use. MICRO 2002: 15-26 - Robert S. Chappell, Francis Tseng, Adi Yoaz, Yale N. Patt:
Microarchitectural support for precomputation microthreads. MICRO 2002: 74-84 - Jamison D. Collins, Suleyman Sair, Brad Calder, Dean M. Tullsen:
Pointer cache assisted prefetching. MICRO 2002: 62-73 - Jesús Corbal, Roger Espasa, Mateo Valero:
Three-dimensional memory vectorization for high bandwidth media memory systems. MICRO 2002: 149-160 - Giuseppe Desoli, Nikolay Mateev, Evelyn Duesterwald, Paolo Faraboschi, Joseph A. Fisher:
DELI: a new run-time control point. MICRO 2002: 257-268 - Steve Dropsho, Volkan Kursun, David H. Albonesi, Sandhya Dwarkadas, Eby G. Friedman:
Managing static leakage energy in microprocessor functional units. MICRO 2002: 321-332 - Changqing Fu, Kent D. Wilken:
A faster optimal register allocator. MICRO 2002: 245-256 - Enric Gibert, F. Jesús Sánchez, Antonio González:
Effective instruction scheduling techniques for an interleaved cache clustered VLIW processor. MICRO 2002: 123-133 - Dirk Grunwald, Soraya Ghiasi:
Microarchitectural denial of service: insuring microarchitectural fairness. MICRO 2002: 409-418 - Steven Hsu, Shih-Lien Lu, Shih-Chang Lai, Ram Krishnamurthy, Konrad Lai:
Dynamic addressing memory arrays with physical locality. MICRO 2002: 161-170 - Ismail Kadayif, Anand Sivasubramaniam, Mahmut T. Kandemir, Gokul B. Kandiraju, Guangyu Chen:
Generating physical addresses directly for saving instruction TLB energy. MICRO 2002: 185-196 - Nam Sung Kim, Krisztián Flautner, David T. Blaauw, Trevor N. Mudge:
Drowsy instruction caches: leakage power reduction using dynamic voltage scaling and cache sub-bank prediction. MICRO 2002: 219-230 - Christoforos E. Kozyrakis, David A. Patterson:
Vector vs. superscalar and VLIW architectures for embedded multimedia benchmarks. MICRO 2002: 283-293 - Rakesh Kumar, Dean M. Tullsen:
Compiling for instruction cache performance on a multithreaded architecture. MICRO 2002: 419-429 - Walter Lee, Diego Puppin, Shane Swenson, Saman P. Amarasinghe:
Convergent scheduling. MICRO 2002: 111-122 - Josep Llosa, Stefan M. Freudenberger:
Reduced code size modulo scheduling in the absence of hardware support. MICRO 2002: 99-110 - Gabriel H. Loh:
Exploiting data-width locality to increase superscalar execution bandwidth. MICRO 2002: 395-405 - José F. Martínez, Jose Renau, Michael C. Huang, Milos Prvulovic, Josep Torrellas:
Cherry: checkpointed early resource recycling in out-of-order microprocessors. MICRO 2002: 3-14 - Gregory A. Muthler, David Crowe, Sanjay J. Patel, Steven Lumetta:
Instruction fetch deferral using static slack. MICRO 2002: 51-61 - Il Park, Michael D. Powell, T. N. Vijaykumar:
Reducing register ports for higher speed and lower energy. MICRO 2002: 171-182 - Vlad Petric, Anne Bracy, Amir Roth:
Three extensions to register integration. MICRO 2002: 37-47 - Alex Ramírez, Oliverio J. Santana, Josep Lluís Larriba-Pey, Mateo Valero:
Fetching instruction streams. MICRO 2002: 371-382 - Amir Roth, Gurindar S. Sohi:
A quantitative framework for automated pre-execution thread selection. MICRO 2002: 430-441 - Greg Semeraro, David H. Albonesi, Steve Dropsho, Grigorios Magklis, Sandhya Dwarkadas, Michael L. Scott:
Dynamic frequency and voltage control for a multiple clock domain microarchitecture. MICRO 2002: 356-367 - André Seznec, Eric Toullec, Olivier Rochecouste:
Register write specialization register read specialization: a path to complexity-effective wide-issue superscalar processors. MICRO 2002: 383-394 - Viji Srinivasan, David M. Brooks, Michael Gschwind, Pradip Bose, Victor V. Zyuban, Philip N. Strenski, Philip G. Emma:
Optimizing pipelines for power and performance. MICRO 2002: 333-344 - Chris J. Thompson, Sahngyun Hahn, Mark Oskin:
Using modern graphics architectures for general-purpose computing: a framework and analysis. MICRO 2002: 306-317
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retrieved on 2024-05-26 08:44 CEST from data curated by the dblp team
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