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Publication search results
found 69 matches
- 1993
- Gabriele Saucier, Jacques Trilhe:
Synthesis for Control Dominated Circuits, Selected papers from the IFIP WG10.2/WG10.5 Workshops, Grenoble, France, April and September, 1992. IFIP Transactions A-22, North-Holland 1993, ISBN 0-444-81479-5 [contents] - 1992
- Pierre Abouzeid, Régis Leveugle, Gabriele Saucier:
Logic Synthesis for Automatic Layout. Synthesis for Control Dominated Circuits 1992: 335-343 - Lotfi Ben Ammar, Alain Greiner:
FITPATH: A Process-Independent Datapath Compiler Providing High Density Layout. Synthesis for Control Dominated Circuits 1992: 133-151 - Jochen Beister, Ralf Wollowski:
Controller Implementation by Communicating Asynchronous Sequential Circuits Generated from a Petri Net Specification of Required Behavior. Synthesis for Control Dominated Circuits 1992: 103-115 - H. Belhadj, Laurent Gerbaux, Marie-Claude Bertrand, Gabriele Saucier:
Specification and Synthesis of Communicating Finite State Machines. Synthesis for Control Dominated Circuits 1992: 91-102 - A. J. W. M. ten Berg:
Floorplan Optimized Topological Partitioning of Programmed Logic Arrays. Synthesis for Control Dominated Circuits 1992: 399-411 - Jörg Biesenack, Norbert Wehn, A. Stoll, Michael Payer:
Data Part Optimizations in the CALLAS Synthesis Environment. Synthesis for Control Dominated Circuits 1992: 263-274 - Joachim Blödel, Markus Brandstetter, Peter Conradi, Walter Drangmeister, Reiner W. Hartenstein, Dietmar Schroeder:
An Information Model Describing the Exchange of IC Technology Data. Electronic Design Automation Frameworks 1992: 9-19 - Jörg Bormann, H. Nusser-Wehlan, Gerd Venzl:
Invited Talk: Formal Design in an Industrial Research Laboratory: Lessons and Perspectives. Designing Correct Circuits 1992: 193-213 - Jay B. Brockman, Stephen W. Director:
A Schema-Based Approach to CAD Task Management. Electronic Design Automation Frameworks 1992: 71-84 - Günter von Bültzingsloewen:
JCF Applied Framework Research - An Overview. Electronic Design Automation Frameworks 1992: 239-252 - Amnon Baron Cohen, Michael Shechory:
Pathway: A datapath layout assembler. Synthesis for Control Dominated Circuits 1992: 119-131 - B. Conq, R. Etienne, T. Perez-Segovia:
Design Library Portability: A Case Study. Synthesis for Control Dominated Circuits 1992: 427-436 - Alan J. Coppola, Marek A. Perkowski, Robert Anderson, Jeffrey S. Freedman, Edmund Pierzchala:
Tokenized State Machine Model for Synthesis of Sequential Circuits into EPLDs and FPGAs. Synthesis for Control Dominated Circuits 1992: 33-46 - Francesco Curatelli, Daniele D. Caviglia, Marco Chirico, Giacomo M. Bisio:
Optimization strategies in symbolic compaction. Synthesis for Control Dominated Circuits 1992: 311-322 - Susan A. Dart:
Parallels in Computer-Aided Design Framework and Software Development Environment Efforts. Electronic Design Automation Frameworks 1992: 175-189 - Bertram Després, M. N. Lipp, Robert Piloty, Ulf Schellin:
Structural Consistency Support in an Integral Design System. Electronic Design Automation Frameworks 1992: 101-117 - Guy Durrieu, Kamel Kessaci, Michel Lemaître:
Transe: An Experimental Transformation Assistant for Digital Circuit Design. Designing Correct Circuits 1992: 103-118 - Jo C. Ebergen, Ad M. G. Peeters:
Modulo-N Counters: Design and Analysis of Delay-Insensitive Circuits. Designing Correct Circuits 1992: 27-46 - Daniel Gajski, Nikil D. Dutt:
Benchmarking and the Art of Syntesis Tool Comparison. Synthesis for Control Dominated Circuits 1992: 439-453 - Eric Gautrin, Laurent Perraudeau:
MADMACS: an environment for the layout of regular arrays. Synthesis for Control Dominated Circuits 1992: 345-358 - Laurent Gerbaux, Régis Leveugle, Gabriele Saucier:
Synthesis of large controllers using ROM or PLA generators. Synthesis for Control Dominated Circuits 1992: 47-59 - Mark R. Greenstreet:
Using Synchronized Transitions for Simulation and Timing Verification. Designing Correct Circuits 1992: 215-236 - Jim Heaton:
The JESSI-COMMON-FRAME Project SP4 Evaluation: Evaluating the Options. Electronic Design Automation Frameworks 1992: 271-277 - ChiLai Huang, Joseph Lis, Michael Quayle, Saurin Shroff:
RTL Controller Synthesis. Synthesis for Control Dominated Circuits 1992: 3-17 - Steve C.-Y. Huang, Wayne H. Wolf:
Timing-Driven State Assignment for Controller-Datapath Systems. Synthesis for Control Dominated Circuits 1992: 19-31 - Uwe Jasnoch:
Global Consistency Management Within a CAD Framework. Electronic Design Automation Frameworks 1992: 53-70 - Werner John, D. Pörtner:
A Framework-Solution for the EMC-Analysis-Domain Based on Graphical Integration-Schema. Electronic Design Automation Frameworks 1992: 141-156 - Mark B. Josephs, Rudolf H. Mak, Jan Tijmen Udding, Tom Verhoeff, Jelio Todorov Yantchev:
High-Level Design of an Asynchronous Packet-Routing Chip. Designing Correct Circuits 1992: 261-274 - A. G. Jost, L. F. Wang, S. Periyalwar, William Robertson:
Automatic Layout Synthesis of Pipelined Multipliers for Systolic Arrays. Synthesis for Control Dominated Circuits 1992: 385-398
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