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@proceedings{DBLP:conf/ifip10-2/1992,
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
publisher = {North-Holland},
year = {1993},
isbn = {0-444-81479-5},
timestamp = {Thu, 07 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/1992.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/AbouzeidLS92,
author = {Pierre Abouzeid and
R{\'{e}}gis Leveugle and
Gabriele Saucier},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Logic Synthesis for Automatic Layout},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {335--343},
publisher = {North-Holland},
year = {1992},
timestamp = {Thu, 01 Jun 2006 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-2/AbouzeidLS92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/AmmarG92,
author = {Lotfi Ben Ammar and
Alain Greiner},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {{FITPATH:} {A} Process-Independent Datapath Compiler Providing High
Density Layout},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {133--151},
publisher = {North-Holland},
year = {1992},
timestamp = {Thu, 07 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/AmmarG92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/BeisterW92,
author = {Jochen Beister and
Ralf Wollowski},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Controller Implementation by Communicating Asynchronous Sequential
Circuits Generated from a Petri Net Specification of Required Behavior},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {103--115},
publisher = {North-Holland},
year = {1992},
timestamp = {Thu, 07 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/BeisterW92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/BelhadjGBS92,
author = {H. Belhadj and
Laurent Gerbaux and
Marie{-}Claude Bertrand and
Gabriele Saucier},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Specification and Synthesis of Communicating Finite State Machines},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {91--102},
publisher = {North-Holland},
year = {1992},
timestamp = {Sat, 28 Sep 2013 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-2/BelhadjGBS92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/Berg92,
author = {A. J. W. M. ten Berg},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Floorplan Optimized Topological Partitioning of Programmed Logic Arrays},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {399--411},
publisher = {North-Holland},
year = {1992},
timestamp = {Thu, 07 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/Berg92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/BiesenackWSP92,
author = {J{\"{o}}rg Biesenack and
Norbert Wehn and
A. Stoll and
Michael Payer},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Data Part Optimizations in the {CALLAS} Synthesis Environment},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {263--274},
publisher = {North-Holland},
year = {1992},
timestamp = {Fri, 11 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-2/BiesenackWSP92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/BloedelBCDHS92,
author = {Joachim Bl{\"{o}}del and
Markus Brandstetter and
Peter Conradi and
Walter Drangmeister and
Reiner W. Hartenstein and
Dietmar Schroeder},
editor = {Mike Newman and
Tom Rhyne},
title = {An Information Model Describing the Exchange of {IC} Technology Data},
booktitle = {Electronic Design Automation Frameworks: When will the promise be
realized? Proceedings of the Third {IFIP} {WG10.2/WG10.5} Workshop
on Electronic Design Automation Frameworks in cooperation with {GI/ITG}
{FG} 3.5.6/5.2.6 Bad Lippspringe, Germany, 23-25 March, 1992},
series = {{IFIP} Transactions},
volume = {{A-16}},
pages = {9--19},
publisher = {North-Holland},
year = {1992},
timestamp = {Mon, 07 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/BloedelBCDHS92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/BormannNV92,
author = {J{\"{o}}rg Bormann and
H. Nusser{-}Wehlan and
Gerd Venzl},
editor = {J{\o}rgen Staunstrup and
Robin Sharp},
title = {Invited Talk: Formal Design in an Industrial Research Laboratory:
Lessons and Perspectives},
booktitle = {Designing Correct Circuits, Proceedings of the Second {IFIP} {WG10.2/WG10.5}
Workshop on Designing Correct Circuits, Lyngby, Denmark, 6-8 January
1992},
series = {{IFIP} Transactions},
volume = {{A-5}},
pages = {193--213},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Feb 2002 13:35:53 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/BormannNV92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/BrockmanD92,
author = {Jay B. Brockman and
Stephen W. Director},
editor = {Mike Newman and
Tom Rhyne},
title = {A Schema-Based Approach to {CAD} Task Management},
booktitle = {Electronic Design Automation Frameworks: When will the promise be
realized? Proceedings of the Third {IFIP} {WG10.2/WG10.5} Workshop
on Electronic Design Automation Frameworks in cooperation with {GI/ITG}
{FG} 3.5.6/5.2.6 Bad Lippspringe, Germany, 23-25 March, 1992},
series = {{IFIP} Transactions},
volume = {{A-16}},
pages = {71--84},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Nov 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/BrockmanD92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/Bultzingsloewen92,
author = {G{\"{u}}nter von B{\"{u}}ltzingsloewen},
editor = {Mike Newman and
Tom Rhyne},
title = {{JCF} Applied Framework Research - An Overview},
booktitle = {Electronic Design Automation Frameworks: When will the promise be
realized? Proceedings of the Third {IFIP} {WG10.2/WG10.5} Workshop
on Electronic Design Automation Frameworks in cooperation with {GI/ITG}
{FG} 3.5.6/5.2.6 Bad Lippspringe, Germany, 23-25 March, 1992},
series = {{IFIP} Transactions},
volume = {{A-16}},
pages = {239--252},
publisher = {North-Holland},
year = {1992},
timestamp = {Fri, 10 Dec 2004 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/Bultzingsloewen92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/CohenS92,
author = {Amnon Baron Cohen and
Michael Shechory},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Pathway: {A} datapath layout assembler},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {119--131},
publisher = {North-Holland},
year = {1992},
timestamp = {Thu, 21 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/CohenS92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/ConqEP92,
author = {B. Conq and
R. Etienne and
T. Perez{-}Segovia},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Design Library Portability: {A} Case Study},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {427--436},
publisher = {North-Holland},
year = {1992},
timestamp = {Thu, 07 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/ConqEP92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/CoppolaPAFP92,
author = {Alan J. Coppola and
Marek A. Perkowski and
Robert Anderson and
Jeffrey S. Freedman and
Edmund Pierzchala},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Tokenized State Machine Model for Synthesis of Sequential Circuits
into EPLDs and FPGAs},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {33--46},
publisher = {North-Holland},
year = {1992},
timestamp = {Thu, 07 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/CoppolaPAFP92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/CuratelliCCB92,
author = {Francesco Curatelli and
Daniele D. Caviglia and
Marco Chirico and
Giacomo M. Bisio},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Optimization strategies in symbolic compaction},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {311--322},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 20 Jun 2006 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-2/CuratelliCCB92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/Dart92,
author = {Susan A. Dart},
editor = {Mike Newman and
Tom Rhyne},
title = {Parallels in Computer-Aided Design Framework and Software Development
Environment Efforts},
booktitle = {Electronic Design Automation Frameworks: When will the promise be
realized? Proceedings of the Third {IFIP} {WG10.2/WG10.5} Workshop
on Electronic Design Automation Frameworks in cooperation with {GI/ITG}
{FG} 3.5.6/5.2.6 Bad Lippspringe, Germany, 23-25 March, 1992},
series = {{IFIP} Transactions},
volume = {{A-16}},
pages = {175--189},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Nov 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/Dart92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/DespresLPS92,
author = {Bertram Despr{\'{e}}s and
M. N. Lipp and
Robert Piloty and
Ulf Schellin},
editor = {Mike Newman and
Tom Rhyne},
title = {Structural Consistency Support in an Integral Design System},
booktitle = {Electronic Design Automation Frameworks: When will the promise be
realized? Proceedings of the Third {IFIP} {WG10.2/WG10.5} Workshop
on Electronic Design Automation Frameworks in cooperation with {GI/ITG}
{FG} 3.5.6/5.2.6 Bad Lippspringe, Germany, 23-25 March, 1992},
series = {{IFIP} Transactions},
volume = {{A-16}},
pages = {101--117},
publisher = {North-Holland},
year = {1992},
timestamp = {Mon, 16 Nov 2015 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/DespresLPS92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/DurrieuKL92,
author = {Guy Durrieu and
Kamel Kessaci and
Michel Lema{\^{\i}}tre},
editor = {J{\o}rgen Staunstrup and
Robin Sharp},
title = {Transe: An Experimental Transformation Assistant for Digital Circuit
Design},
booktitle = {Designing Correct Circuits, Proceedings of the Second {IFIP} {WG10.2/WG10.5}
Workshop on Designing Correct Circuits, Lyngby, Denmark, 6-8 January
1992},
series = {{IFIP} Transactions},
volume = {{A-5}},
pages = {103--118},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/DurrieuKL92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/EbergenP92,
author = {Jo C. Ebergen and
Ad M. G. Peeters},
editor = {J{\o}rgen Staunstrup and
Robin Sharp},
title = {Modulo-N Counters: Design and Analysis of Delay-Insensitive Circuits},
booktitle = {Designing Correct Circuits, Proceedings of the Second {IFIP} {WG10.2/WG10.5}
Workshop on Designing Correct Circuits, Lyngby, Denmark, 6-8 January
1992},
series = {{IFIP} Transactions},
volume = {{A-5}},
pages = {27--46},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/EbergenP92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/GajskiD92,
author = {Daniel Gajski and
Nikil D. Dutt},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Benchmarking and the Art of Syntesis Tool Comparison},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {439--453},
publisher = {North-Holland},
year = {1992},
timestamp = {Thu, 07 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/GajskiD92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/GautrinP92,
author = {Eric Gautrin and
Laurent Perraudeau},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {{MADMACS:} an environment for the layout of regular arrays},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {345--358},
publisher = {North-Holland},
year = {1992},
timestamp = {Thu, 21 Aug 2003 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-2/GautrinP92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/GerbauxLS92,
author = {Laurent Gerbaux and
R{\'{e}}gis Leveugle and
Gabriele Saucier},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Synthesis of large controllers using {ROM} or {PLA} generators},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {47--59},
publisher = {North-Holland},
year = {1992},
timestamp = {Sat, 28 Sep 2013 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-2/GerbauxLS92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/Greenstreet92,
author = {Mark R. Greenstreet},
editor = {J{\o}rgen Staunstrup and
Robin Sharp},
title = {Using Synchronized Transitions for Simulation and Timing Verification},
booktitle = {Designing Correct Circuits, Proceedings of the Second {IFIP} {WG10.2/WG10.5}
Workshop on Designing Correct Circuits, Lyngby, Denmark, 6-8 January
1992},
series = {{IFIP} Transactions},
volume = {{A-5}},
pages = {215--236},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/Greenstreet92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/Heaton92,
author = {Jim Heaton},
editor = {Mike Newman and
Tom Rhyne},
title = {The {JESSI-COMMON-FRAME} Project {SP4} Evaluation: Evaluating the
Options},
booktitle = {Electronic Design Automation Frameworks: When will the promise be
realized? Proceedings of the Third {IFIP} {WG10.2/WG10.5} Workshop
on Electronic Design Automation Frameworks in cooperation with {GI/ITG}
{FG} 3.5.6/5.2.6 Bad Lippspringe, Germany, 23-25 March, 1992},
series = {{IFIP} Transactions},
volume = {{A-16}},
pages = {271--277},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Nov 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/Heaton92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/HuangLQS92,
author = {ChiLai Huang and
Joseph Lis and
Michael Quayle and
Saurin Shroff},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {{RTL} Controller Synthesis},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {3--17},
publisher = {North-Holland},
year = {1992},
timestamp = {Thu, 07 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/HuangLQS92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/HuangW92,
author = {Steve C.{-}Y. Huang and
Wayne H. Wolf},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Timing-Driven State Assignment for Controller-Datapath Systems},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {19--31},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 02 Aug 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-2/HuangW92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/Jasnoch92,
author = {Uwe Jasnoch},
editor = {Mike Newman and
Tom Rhyne},
title = {Global Consistency Management Within a {CAD} Framework},
booktitle = {Electronic Design Automation Frameworks: When will the promise be
realized? Proceedings of the Third {IFIP} {WG10.2/WG10.5} Workshop
on Electronic Design Automation Frameworks in cooperation with {GI/ITG}
{FG} 3.5.6/5.2.6 Bad Lippspringe, Germany, 23-25 March, 1992},
series = {{IFIP} Transactions},
volume = {{A-16}},
pages = {53--70},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Nov 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/Jasnoch92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/JohnP92,
author = {Werner John and
D. P{\"{o}}rtner},
editor = {Mike Newman and
Tom Rhyne},
title = {A Framework-Solution for the EMC-Analysis-Domain Based on Graphical
Integration-Schema},
booktitle = {Electronic Design Automation Frameworks: When will the promise be
realized? Proceedings of the Third {IFIP} {WG10.2/WG10.5} Workshop
on Electronic Design Automation Frameworks in cooperation with {GI/ITG}
{FG} 3.5.6/5.2.6 Bad Lippspringe, Germany, 23-25 March, 1992},
series = {{IFIP} Transactions},
volume = {{A-16}},
pages = {141--156},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Nov 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/JohnP92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/JosephsMUVY92,
author = {Mark B. Josephs and
Rudolf H. Mak and
Jan Tijmen Udding and
Tom Verhoeff and
Jelio Todorov Yantchev},
editor = {J{\o}rgen Staunstrup and
Robin Sharp},
title = {High-Level Design of an Asynchronous Packet-Routing Chip},
booktitle = {Designing Correct Circuits, Proceedings of the Second {IFIP} {WG10.2/WG10.5}
Workshop on Designing Correct Circuits, Lyngby, Denmark, 6-8 January
1992},
series = {{IFIP} Transactions},
volume = {{A-5}},
pages = {261--274},
publisher = {North-Holland},
year = {1992},
timestamp = {Thu, 06 Oct 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-2/JosephsMUVY92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/JostWPR92,
author = {A. G. Jost and
L. F. Wang and
S. Periyalwar and
William Robertson},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Automatic Layout Synthesis of Pipelined Multipliers for Systolic Arrays},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {385--398},
publisher = {North-Holland},
year = {1992},
timestamp = {Thu, 09 Jun 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-2/JostWPR92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/KapuyaE92,
author = {E. T. Kapuya and
M. D. Edwards},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Microarchitecture/Microcode Synthesis from {VHDL}},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {209--218},
publisher = {North-Holland},
year = {1992},
timestamp = {Thu, 07 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/KapuyaE92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/KathoferM92,
author = {Thomas Kath{\"{o}}fer and
J. Miller},
editor = {Mike Newman and
Tom Rhyne},
title = {The {JESSI-COMMON-FRAME} Project - Sub-project Development},
booktitle = {Electronic Design Automation Frameworks: When will the promise be
realized? Proceedings of the Third {IFIP} {WG10.2/WG10.5} Workshop
on Electronic Design Automation Frameworks in cooperation with {GI/ITG}
{FG} 3.5.6/5.2.6 Bad Lippspringe, Germany, 23-25 March, 1992},
series = {{IFIP} Transactions},
volume = {{A-16}},
pages = {253--269},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Nov 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/KathoferM92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/KatsadasSWDBSM92,
author = {Evagelos Katsadas and
Zohair Sahraoui and
Maryse Wouters and
Veerle Derudder and
Ivo Bolsens and
Paul Six and
Hugo De Man},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Regular Module Generation or Standard Cells: Two Alternative Implementations
of a Library of Functional Building Blocks},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {167--181},
publisher = {North-Holland},
year = {1992},
timestamp = {Sat, 30 Apr 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-2/KatsadasSWDBSM92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/KifliWZGSM92,
author = {Augusli Kifli and
R. De Wulf and
J. Zegers and
Gert Goossens and
Paul Six and
Hugo De Man},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Flag/Condition Handling and Branch Assignment for Large Microcoded
Controllers},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {61--71},
publisher = {North-Holland},
year = {1992},
timestamp = {Wed, 10 Jul 2002 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-2/KifliWZGSM92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/KishinevskyKTV92,
author = {Michael Kishinevsky and
Alex Kondratyev and
Alexander Taubin and
Victor Varshavsky},
editor = {J{\o}rgen Staunstrup and
Robin Sharp},
title = {Analysis and Identification of Self-Timed Circuits},
booktitle = {Designing Correct Circuits, Proceedings of the Second {IFIP} {WG10.2/WG10.5}
Workshop on Designing Correct Circuits, Lyngby, Denmark, 6-8 January
1992},
series = {{IFIP} Transactions},
volume = {{A-5}},
pages = {275--287},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/KishinevskyKTV92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/Krischer92,
author = {Stefan Krischer},
editor = {J{\o}rgen Staunstrup and
Robin Sharp},
title = {Incomplete TRS-Specifications of Boolean Functions and their Verification},
booktitle = {Designing Correct Circuits, Proceedings of the Second {IFIP} {WG10.2/WG10.5}
Workshop on Designing Correct Circuits, Lyngby, Denmark, 6-8 January
1992},
series = {{IFIP} Transactions},
volume = {{A-5}},
pages = {67--79},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/Krischer92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/Kupitz92,
author = {Elisabeth Kupitz},
editor = {Mike Newman and
Tom Rhyne},
title = {Design Assistance in Concurrent Integrated Environments},
booktitle = {Electronic Design Automation Frameworks: When will the promise be
realized? Proceedings of the Third {IFIP} {WG10.2/WG10.5} Workshop
on Electronic Design Automation Frameworks in cooperation with {GI/ITG}
{FG} 3.5.6/5.2.6 Bad Lippspringe, Germany, 23-25 March, 1992},
series = {{IFIP} Transactions},
volume = {{A-16}},
pages = {119--138},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Nov 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/Kupitz92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/LeveugleS92,
author = {R{\'{e}}gis Leveugle and
C. Safina},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Generation of optimized datapaths: bit-slice versus standard cells},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {153--166},
publisher = {North-Holland},
year = {1992},
timestamp = {Mon, 03 Feb 2003 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/LeveugleS92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/LisperR92,
author = {Bj{\"{o}}rn Lisper and
Sanjay V. Rajopadhye},
editor = {J{\o}rgen Staunstrup and
Robin Sharp},
title = {Reasoning about Permutations in Regular Arrays},
booktitle = {Designing Correct Circuits, Proceedings of the Second {IFIP} {WG10.2/WG10.5}
Workshop on Designing Correct Circuits, Lyngby, Denmark, 6-8 January
1992},
series = {{IFIP} Transactions},
volume = {{A-5}},
pages = {139--157},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/LisperR92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/Martinez92,
author = {Antonio Martinez},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Timing Model Accuracy Issues and Automated Library Characterization},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {413--426},
publisher = {North-Holland},
year = {1992},
timestamp = {Thu, 07 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/Martinez92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/MartinsCS92,
author = {Jo{\~{a}}o Martins and
Jo{\~{a}}o Camara and
Helena Sarmento},
editor = {Mike Newman and
Tom Rhyne},
title = {User Interaction in a Silicon Compilation Environment},
booktitle = {Electronic Design Automation Frameworks: When will the promise be
realized? Proceedings of the Third {IFIP} {WG10.2/WG10.5} Workshop
on Electronic Design Automation Frameworks in cooperation with {GI/ITG}
{FG} 3.5.6/5.2.6 Bad Lippspringe, Germany, 23-25 March, 1992},
series = {{IFIP} Transactions},
volume = {{A-16}},
pages = {157--174},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Nov 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/MartinsCS92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/Marwedel92,
author = {Peter Marwedel},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Implementations of IF-statements in the {TODOS} microarchitecture
synthesis system},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {249--262},
publisher = {North-Holland},
year = {1992},
timestamp = {Thu, 07 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/Marwedel92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/Mavaddat92,
author = {Farhad Mavaddat},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Data-Path Synthesis as Grammar Inference},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {193--205},
publisher = {North-Holland},
year = {1992},
timestamp = {Thu, 07 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/Mavaddat92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/MendlerS92,
author = {Michael Mendler and
Terry Stroup},
editor = {J{\o}rgen Staunstrup and
Robin Sharp},
title = {Newtonian Arbiters Cannot be Proven Correct},
booktitle = {Designing Correct Circuits, Proceedings of the Second {IFIP} {WG10.2/WG10.5}
Workshop on Designing Correct Circuits, Lyngby, Denmark, 6-8 January
1992},
series = {{IFIP} Transactions},
volume = {{A-5}},
pages = {47--66},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/MendlerS92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/MignotteBPRS92,
author = {Anne Mignotte and
Marie{-}Claude Bertrand and
Michel Crastes de Paulet and
J{\'{e}}r{\^{o}}me Rampon and
Gabriele Saucier},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {{ASYL:} {A} Control Driven {RTL} Synthesis System using Library Blocks},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {275--291},
publisher = {North-Holland},
year = {1992},
timestamp = {Thu, 07 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/MignotteBPRS92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/MoshnyagaTY92,
author = {Vasily G. Moshnyaga and
Keikichi Tamaru and
Hiroto Yasuura},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Design of data-path module generators from algorithmic representations},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {183--192},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 30 Apr 2002 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-2/MoshnyagaTY92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/Munzner92,
author = {Andreas M{\"{u}}nzner},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {{BADGE} - {A} synthesis tool for customized arithmetic building blocks},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {373--384},
publisher = {North-Holland},
year = {1992},
timestamp = {Thu, 07 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/Munzner92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/Naur92,
author = {Peter Naur},
editor = {J{\o}rgen Staunstrup and
Robin Sharp},
title = {Invited talk: Three Notions of Proof},
booktitle = {Designing Correct Circuits, Proceedings of the Second {IFIP} {WG10.2/WG10.5}
Workshop on Designing Correct Circuits, Lyngby, Denmark, 6-8 January
1992},
series = {{IFIP} Transactions},
volume = {{A-5}},
pages = {97--101},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/Naur92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/Pardey92,
author = {James Pardey},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {The Synthesis of a Parallel Controller from a Petri Net Model},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {73--89},
publisher = {North-Holland},
year = {1992},
timestamp = {Thu, 07 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/Pardey92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/ParkOJ92,
author = {Inhag Park and
Kevin O'Brien and
Ahmed Amine Jerraya},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {{AMICAL:} Architectural Synthesis based on {VHDL}},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {219--234},
publisher = {North-Holland},
year = {1992},
timestamp = {Mon, 20 Apr 2015 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-2/ParkOJ92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/Rhyne92,
author = {Tom Rhyne},
editor = {Mike Newman and
Tom Rhyne},
title = {{ECAD} Design Technology-Where Does it Stand?},
booktitle = {Electronic Design Automation Frameworks: When will the promise be
realized? Proceedings of the Third {IFIP} {WG10.2/WG10.5} Workshop
on Electronic Design Automation Frameworks in cooperation with {GI/ITG}
{FG} 3.5.6/5.2.6 Bad Lippspringe, Germany, 23-25 March, 1992},
series = {{IFIP} Transactions},
volume = {{A-16}},
pages = {3--5},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Nov 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/Rhyne92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/RossenS92,
author = {Lars Rossen and
Robin Sharp},
editor = {J{\o}rgen Staunstrup and
Robin Sharp},
title = {Sequence Semantics of Ruby},
booktitle = {Designing Correct Circuits, Proceedings of the Second {IFIP} {WG10.2/WG10.5}
Workshop on Designing Correct Circuits, Lyngby, Denmark, 6-8 January
1992},
series = {{IFIP} Transactions},
volume = {{A-5}},
pages = {159--171},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/RossenS92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/RumseyCLF92,
author = {Michael Rumsey and
Neil Crofts and
Bob Luckin and
Colin Farquhar},
editor = {Mike Newman and
Tom Rhyne},
title = {Measuring Frameworks},
booktitle = {Electronic Design Automation Frameworks: When will the promise be
realized? Proceedings of the Third {IFIP} {WG10.2/WG10.5} Workshop
on Electronic Design Automation Frameworks in cooperation with {GI/ITG}
{FG} 3.5.6/5.2.6 Bad Lippspringe, Germany, 23-25 March, 1992},
series = {{IFIP} Transactions},
volume = {{A-16}},
pages = {193--206},
publisher = {North-Holland},
year = {1992},
timestamp = {Fri, 13 Nov 2015 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/RumseyCLF92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/SafinaL92,
author = {C. Safina and
R{\'{e}}gis Leveugle},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Clocking scheme selection for circuits made up of a controller and
a datapath},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {293--308},
publisher = {North-Holland},
year = {1992},
timestamp = {Mon, 03 Feb 2003 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/SafinaL92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/SaxeGGH92,
author = {James B. Saxe and
Stephen J. Garland and
John V. Guttag and
James J. Horning},
editor = {J{\o}rgen Staunstrup and
Robin Sharp},
title = {Using Transformations and Verification in Ciruit Design},
booktitle = {Designing Correct Circuits, Proceedings of the Second {IFIP} {WG10.2/WG10.5}
Workshop on Designing Correct Circuits, Lyngby, Denmark, 6-8 January
1992},
series = {{IFIP} Transactions},
volume = {{A-5}},
pages = {1--25},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/SaxeGGH92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/SchettlerB92,
author = {Olav Schettler and
Ansgar Bredenfeld},
editor = {Mike Newman and
Tom Rhyne},
title = {Handling Schema Information in the {DASSY} Data Model},
booktitle = {Electronic Design Automation Frameworks: When will the promise be
realized? Proceedings of the Third {IFIP} {WG10.2/WG10.5} Workshop
on Electronic Design Automation Frameworks in cooperation with {GI/ITG}
{FG} 3.5.6/5.2.6 Bad Lippspringe, Germany, 23-25 March, 1992},
series = {{IFIP} Transactions},
volume = {{A-16}},
pages = {41--50},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Nov 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/SchettlerB92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/Singh92,
author = {Satnam Singh},
editor = {J{\o}rgen Staunstrup and
Robin Sharp},
title = {Circuit Analysis by Non-Standard Interpretation},
booktitle = {Designing Correct Circuits, Proceedings of the Second {IFIP} {WG10.2/WG10.5}
Workshop on Designing Correct Circuits, Lyngby, Denmark, 6-8 January
1992},
series = {{IFIP} Transactions},
volume = {{A-5}},
pages = {119--138},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/Singh92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/SmithZ92,
author = {Scott F. Smith and
Amy E. Zwarico},
editor = {J{\o}rgen Staunstrup and
Robin Sharp},
title = {Provably Correct Synthesis of Asynchronous Circuits},
booktitle = {Designing Correct Circuits, Proceedings of the Second {IFIP} {WG10.2/WG10.5}
Workshop on Designing Correct Circuits, Lyngby, Denmark, 6-8 January
1992},
series = {{IFIP} Transactions},
volume = {{A-5}},
pages = {237--260},
publisher = {North-Holland},
year = {1992},
timestamp = {Thu, 21 Dec 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/SmithZ92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/Steinmuller92,
author = {Bernd Steinm{\"{u}}ller},
editor = {Mike Newman and
Tom Rhyne},
title = {The {JESSI-COMMON-FRAME} Project - {A} Project Overview},
booktitle = {Electronic Design Automation Frameworks: When will the promise be
realized? Proceedings of the Third {IFIP} {WG10.2/WG10.5} Workshop
on Electronic Design Automation Frameworks in cooperation with {GI/ITG}
{FG} 3.5.6/5.2.6 Bad Lippspringe, Germany, 23-25 March, 1992},
series = {{IFIP} Transactions},
volume = {{A-16}},
pages = {227--238},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Nov 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/Steinmuller92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/TheeuwenAESW92,
author = {J. F. M. Theeuwen and
H. M. A. M. Arts and
Jos T. J. van Eijndhoven and
H. J. H. Sleuters and
J. H. P. Wijdeven},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Module Generation in an Architectural Synthesis Environment},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {359--371},
publisher = {North-Holland},
year = {1992},
timestamp = {Thu, 07 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/TheeuwenAESW92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/ThuauB92,
author = {Ghislaine Thuau and
Bachir Berkane},
editor = {J{\o}rgen Staunstrup and
Robin Sharp},
title = {Using the Language Lustre for Sequential Circuit Verification},
booktitle = {Designing Correct Circuits, Proceedings of the Second {IFIP} {WG10.2/WG10.5}
Workshop on Designing Correct Circuits, Lyngby, Denmark, 6-8 January
1992},
series = {{IFIP} Transactions},
volume = {{A-5}},
pages = {81--96},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/ThuauB92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/VerkestCM92,
author = {Diederik Verkest and
Luc J. M. Claesen and
Hugo De Man},
editor = {J{\o}rgen Staunstrup and
Robin Sharp},
title = {A Proof of the Non-Restoring Division Algorithm and its Implementation
on the Cathedral-II {ALU}},
booktitle = {Designing Correct Circuits, Proceedings of the Second {IFIP} {WG10.2/WG10.5}
Workshop on Designing Correct Circuits, Lyngby, Denmark, 6-8 January
1992},
series = {{IFIP} Transactions},
volume = {{A-5}},
pages = {173--192},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/VerkestCM92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/VideiraS92,
author = {Idalina Videira and
Helena Sarmento},
editor = {Mike Newman and
Tom Rhyne},
title = {Tool Integration Made Easier},
booktitle = {Electronic Design Automation Frameworks: When will the promise be
realized? Proceedings of the Third {IFIP} {WG10.2/WG10.5} Workshop
on Electronic Design Automation Frameworks in cooperation with {GI/ITG}
{FG} 3.5.6/5.2.6 Bad Lippspringe, Germany, 23-25 March, 1992},
series = {{IFIP} Transactions},
volume = {{A-16}},
pages = {207--223},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Nov 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/VideiraS92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/WagnerGLL92,
author = {Fl{\'{a}}vio Rech Wagner and
Lia Goldstein Golendziner and
Jean Lacombe and
Arnaldo Hil{\'{a}}rio Viegas de Lima},
editor = {Mike Newman and
Tom Rhyne},
title = {Design Version Management in the {STAR} Framework},
booktitle = {Electronic Design Automation Frameworks: When will the promise be
realized? Proceedings of the Third {IFIP} {WG10.2/WG10.5} Workshop
on Electronic Design Automation Frameworks in cooperation with {GI/ITG}
{FG} 3.5.6/5.2.6 Bad Lippspringe, Germany, 23-25 March, 1992},
series = {{IFIP} Transactions},
volume = {{A-16}},
pages = {85--97},
publisher = {North-Holland},
year = {1992},
timestamp = {Fri, 16 Dec 2005 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/WagnerGLL92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/WilkesS92,
author = {Wolfgang Wilkes and
Gerhard Scholz},
editor = {Mike Newman and
Tom Rhyne},
title = {Different Levels of Information Models for Use in Frameworks},
booktitle = {Electronic Design Automation Frameworks: When will the promise be
realized? Proceedings of the Third {IFIP} {WG10.2/WG10.5} Workshop
on Electronic Design Automation Frameworks in cooperation with {GI/ITG}
{FG} 3.5.6/5.2.6 Bad Lippspringe, Germany, 23-25 March, 1992},
series = {{IFIP} Transactions},
volume = {{A-16}},
pages = {21--40},
publisher = {North-Holland},
year = {1992},
timestamp = {Tue, 19 Nov 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/WilkesS92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/WuD92,
author = {Yang Wu and
Ian Dorrington},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {{RTL} OptimizA: From Control Data Flow Graph to Logic Circuit},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {235--247},
publisher = {North-Holland},
year = {1992},
timestamp = {Thu, 07 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/WuD92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/ZhangA92,
author = {H. Zhang and
Kunihiro Asada},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {A general and efficient mask pattern generator for non-series-parallel
{CMOS} transistor network},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {323--333},
publisher = {North-Holland},
year = {1992},
timestamp = {Thu, 07 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/ZhangA92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ifip10-2/1992a,
editor = {J{\o}rgen Staunstrup and
Robin Sharp},
title = {Designing Correct Circuits, Proceedings of the Second {IFIP} {WG10.2/WG10.5}
Workshop on Designing Correct Circuits, Lyngby, Denmark, 6-8 January
1992},
series = {{IFIP} Transactions},
volume = {{A-5}},
publisher = {North-Holland},
year = {1992},
isbn = {0-444-89335-0},
timestamp = {Tue, 19 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/1992a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ifip10-2/1992b,
editor = {Mike Newman and
Tom Rhyne},
title = {Electronic Design Automation Frameworks: When will the promise be
realized? Proceedings of the Third {IFIP} {WG10.2/WG10.5} Workshop
on Electronic Design Automation Frameworks in cooperation with {GI/ITG}
{FG} 3.5.6/5.2.6 Bad Lippspringe, Germany, 23-25 March, 1992},
series = {{IFIP} Transactions},
volume = {{A-16}},
publisher = {North-Holland},
year = {1992},
isbn = {0-444-89820-4},
timestamp = {Tue, 19 Nov 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/1992b.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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