- Junseok Oh, Florian Neugebauer, Ilia Polian, John P. Hayes:
Retraining and Regularization to Optimize Neural Networks for Stochastic Computing. ISVLSI 2020: 246-251 - Ibrahim L. Olokodana, Saraju P. Mohanty, Elias Kougianos:
Distributed Kriging-Bootstrapped DNN Model for Fast, Accurate Seizure Detection from EEG Signals. ISVLSI 2020: 264-269 - Gianmarco Ottavi, Angelo Garofalo, Giuseppe Tagliavini, Francesco Conti, Luca Benini, Davide Rossi:
A Mixed-Precision RISC-V Processor for Extreme-Edge DNN Inference. ISVLSI 2020: 512-517 - Oumarou Oumarou, Alexandru Paler
, Robert Basmadjian:
QUANTIFY: A Framework for Resource Analysis and Design Verification of Quantum Circuits. ISVLSI 2020: 126-131 - Vinay C. Patil, Sandip Kundu:
On Leveraging Multi-threshold FinFETs for Design Obfuscation. ISVLSI 2020: 108-113 - Joseph Paturel, Angeliki Kritikakou
, Olivier Sentieys:
Fast Cross-Layer Vulnerability Analysis of Complex Hardware Designs. ISVLSI 2020: 328-333 - Farzane Rabiee, Mostafa Kajouyan, Newsha Estiri, Jordan Fluech, Mahdi Fazeli, Ahmad Patooghy:
Enduring Non-Volatile L1 Cache Using Low-Retention-Time STTRAM Cells. ISVLSI 2020: 322-327 - Saswat Kumar Ram
, Shubham Chourasia, Banee Bandana Das
, Ayas Kanta Swain, Kamalakanta Mahapatra, Saraju P. Mohanty:
A Solar Based Power Module for Battery-Less IoT Sensors Towards Sustainable Smart Cities. ISVLSI 2020: 458-463 - Gopal Raut
, Shubham Rai, Santosh Kumar Vishvakarma, Akash Kumar:
A CORDIC Based Configurable Activation Function for ANN Applications. ISVLSI 2020: 78-83 - Cezar Reinbrecht
, Abdullah Aljuffri, Said Hamdioui, Mottaqiallah Taouil, Bruno Forlin, Johanna Sepúlveda:
Guard-NoC: A Protection Against Side-Channel Attacks for MPSoCs. ISVLSI 2020: 536-541 - Bastian Richter, Amir Moradi
:
Lightweight Ciphers on a 65 nm ASIC A Comparative Study on Energy Consumption. ISVLSI 2020: 530-535 - Margherita Ronchini, Milad Zamani
, Hooman Farkhani, Farshad Moradi:
Tunable Voltage-Mode Subthreshold CMOS Neuron. ISVLSI 2020: 252-257 - Sayed Ahmad Salehi, Durjoy Deb Dhruba
:
Efficient Hardware Implementation of Discrete Wavelet Transform Based on Stochastic Computing. ISVLSI 2020: 422-427 - Alhagie Sallah, Prabha Sundaravadivel:
Tot-Mon: A Real-Time Internet of Things Based Affective Framework for Monitoring Infants. ISVLSI 2020: 600-601 - Smrutilekha Samanta
, Santanu Sarkar:
A 1.8V 8-Bit 500 MSPS Segmented Current Steering DAC with >66 dB SFDR. ISVLSI 2020: 13-17 - Jitumani Sarma, Shatadal Chatterjee, Rakesh Biswas
, Sounak Roy:
A Fast Transient Digitally Assisted Flash-Based Modular LDO for Sensor Nodes in WBAN. ISVLSI 2020: 363-367 - Selahattin Sayil, Subed Lamichhane, Kutay Sayil:
Coupling Noise Mitigation using a Pass Transistor. ISVLSI 2020: 358-362 - Ameer Shalabi, Kolin Paul, Tara Ghasempouri
, Jaan Raik:
NV-SP: A New High Performance and Low Energy NVM-Based Scratch Pad. ISVLSI 2020: 54-59 - Liuting Shang, Muhammad Adil, Ramtin Madani, Chenyun Pan:
Fast Linear Programming Optimization Using Crossbar-Based Analog Accelerator. ISVLSI 2020: 276-281 - Stavros Simoglou, Christos P. Sotiriou, Dimitris Valiantzas, Nikolaos Sketopoulos:
STA for Mixed Cyclic, Acyclic Circuits. ISVLSI 2020: 392-397 - Nikolaos Sketopoulos, Christos P. Sotiriou, Vasilis F. Pavlidis:
Metal Stack and Partitioning Exploration for Monolithic 3D ICs. ISVLSI 2020: 398-403 - Tiankai Su, Atif Yasin, Sébastien Pillement, Maciej J. Ciesielski:
Formal Verification of Constrained Arithmetic Circuits using Computer Algebraic Approach. ISVLSI 2020: 386-391 - Shashank Suman, Hemangee K. Kapoor:
Reinforcement Learning Based Refresh Optimized Volatile STT-RAM Cache. ISVLSI 2020: 222-227 - Jianchi Sun, Nikhilesh Sharma, Jacob Chakareski, Nicholas Mastronarde, Yingjie Lao:
Action Evaluation Hardware Accelerator for Next-Generation Real-Time Reinforcement Learning in Emerging IoT Systems. ISVLSI 2020: 428-433 - Weihang Tan, Antian Wang, Yunhao Xu, Yingjie Lao:
Area-Efficient Pipelined VLSI Architecture for Polar Decoder. ISVLSI 2020: 352-357 - Teruo Tanimoto
, Shuhei Matsuo, Satoshi Kawakami
, Yutaka Tabuchi
, Masao Hirokawa
, Koji Inoue:
How Many Trials Do We Need for Reliable NISQ Computing? ISVLSI 2020: 288-290 - Teruo Tanimoto
, Shuhei Matsuo, Satoshi Kawakami
, Yutaka Tabuchi
, Masao Hirokawa
, Koji Inoue:
Practical Error Modeling Toward Realistic NISQ Simulation. ISVLSI 2020: 291-293 - Ahmad Tarraf
, Lars Hedrich, Niklas Kochdumper, Malgorzata Rechmal-Lesse, Markus Olbrich:
Equivalence Checking Methods for Analog Circuits Using Continuous Reachable Sets. ISVLSI 2020: 7-12 - Saurabh Tewari
, Anshul Kumar, Kolin Paul:
Bus Width Aware Off-Chip Memory Access Minimization for CNN Accelerators. ISVLSI 2020: 240-245 - Daniel Vert, Renaud Sirdey
, Stéphane Louise:
Operational Quantum Annealers are Cursed by their Qubits Interconnection Topologies. ISVLSI 2020: 282-287