share record
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Edward K. F. Lee : Reconfigurable data converter as a building block for mixed-signal test. ED&TC 1997 : 359-363 share record
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Jeroen A. J. Leijten , Jef L. van Meerbergen , Adwin H. Timmer , Jochen A. G. Jess : PROPHID: a data-driven multi-processor architecture for high-performance DSP. ED&TC 1997 : 611 share record
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Rainer Leupers , Peter Marwedel : Retargetable generation of code selectors from HDL processor models. ED&TC 1997 : 140-144 share record
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Yanbing Li , Wayne H. Wolf : Hierarchical scheduling and allocation of multirate systems on heterogeneous multiprocessors. ED&TC 1997 : 134-139 share record
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Clifford Liem , Pierre G. Paulin , Ahmed Amine Jerraya : ReCode: the design and re-design of the instruction codes for embedded instruction-set processors. ED&TC 1997 : 612 share record
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Le-Chin Eugene Liu , Carl Sechen : Multi-layer chip-level global routing using an efficient graph-based Steiner tree heuristic. ED&TC 1997 : 311-318 share record
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Guo-Neng Lu , Gerard Sou : A CMOS low-voltage, high-gain op-amp. ED&TC 1997 : 51-55 share record
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Salvador Manich , Joan Figueras : Maximizing the weighted switching activity in combinational CMOS circuits under the variable delay model. ED&TC 1997 : 597-602 share record
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Anne Mignotte , Olivier Peyran : Scheduling using mixed arithmetic: an ILP formulation. ED&TC 1997 : 621 share record
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Miguel Miranda , M. Kaspar , Francky Catthoor , Hugo De Man : Architectural exploration and optimization for counter based hardware address generation. ED&TC 1997 : 293-298 export record
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conf/date/NarayananSKLB97 share record
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Sridhar Narayanan , R. Srinivasan , R. P. Kunda , Marc E. Levitt , Saied Bozorgui-Nesbat : A fault diagnosis methodology for the UltraSPARCTM -I microprocessor. ED&TC 1997 : 494-500 share record
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Mehrdad Nourani , Christos A. Papachristou : Structural BIST insertion using behavioral test analysis. ED&TC 1997 : 64-68 share record
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Thomas Olbrich , Ian Andrew Grout , Y. Eben Aimine , Andrew Mark David Richardson , Jean-Noël Contensou : A new quality estimation methodology for mixed-signal and analogue ICs. ED&TC 1997 : 573-580 share record
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Igor Ozimek , R. Verlic , Jurij F. Tasic : Optimal scheduling for fast systolic array implementations. ED&TC 1997 : 620 share record
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Preeti Ranjan Panda , Nikil D. Dutt , Alexandru Nicolau : Efficient utilization of scratch-pad memory in embedded processor applications. ED&TC 1997 : 7-11 share record
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Antonis M. Paschalis , Nikolaos Gaitanis , Dimitris Gizopoulos , Panagiotis Kostarakis : A totally self-checking 1-out-of-3 code error indicator. ED&TC 1997 : 450-454 share record
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Irith Pomeranz , Sudhakar M. Reddy : On improving genetic optimization based test generation. ED&TC 1997 : 506-511 share record
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Irith Pomeranz , Sudhakar M. Reddy : On the use of reset to increase the testability of interconnected finite-state machines. ED&TC 1997 : 554-559 share record
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Juan A. Prieto , Adoración Rueda , José M. Quintana , José Luis Huertas : A performance-driven placement algorithm with simultaneous Place&Route optimization for analog ICs. ED&TC 1997 : 389-394 share record
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Michel Renovell , Florence Azaïs , Yves Bertrand : On-chip analog output response compaction. ED&TC 1997 : 568-572 share record
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Jacobo Riesco , Juan Carlos Diaz , Luis A. Merayo , José Luis Conesa , Carlos Santos , Eduardo Juárez Martínez : On the way to the 2.5 Gbits/s ATM network ATM multiplexer demultiplexer ASIC. ED&TC 1997 : 218-222 export record
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conf/date/RomanowiczLLRABMP97 share record
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B. Romanowicz , M. Laudon , P. Lerch , Philippe Renaud , Hans Peter Amann , A. Boegli , Vincent Moser , Fausto Pellandini : Modeling and simulation of electromechanical transducers in microsystems using an analog hardware description language. ED&TC 1997 : 119-123 share record
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Thomas Röwekamp , Liliane Peters : A real-time smart sensor system for visual motion estimation. ED&TC 1997 : 613 share record
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Ander Royo , Javier Moran , Juan Carlos López : Design and implementation of a coprocessor for cryptography applications. ED&TC 1997 : 213-217 share record
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Manoj Sachdev : Deep sub-micron IDDQ testing: issues and solutions. ED&TC 1997 : 271-278 share record
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Vikram Saxena , Farid N. Najm , Ibrahim N. Hajj : Monte-Carlo approach for power estimation in sequential circuits. ED&TC 1997 : 416-420 export record
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conf/date/SchaumontVREB97 share record
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Patrick Schaumont , Serge Vernalde , Luc Rijnders , Marc Engels , Ivo Bolsens : Synthesis of multi-rate and variable rate circuits for high speed telecommunications applications. ED&TC 1997 : 542-546 share record
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Claus Schneider : A methodology for hardware architecture trade-off at different levels of abstraction. ED&TC 1997 : 537-541 share record
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Christoph Scholl , S. Melchior , Günter Hotz , Paul Molitor : Minimizing ROBDD sizes of incompletely specified Boolean functionsby exploiting strong symmetries. ED&TC 1997 : 229-234 share record
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K. S. Seong , C. M. Kyung : Two-way partitioning based on direction vector [layout design]. ED&TC 1997 : 306-310