"A performance-driven placement algorithm with simultaneous Place&Route ..."

Juan A. Prieto et al. (1997)

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DOI: 10.1109/EDTC.1997.582389

access: closed

type: Conference or Workshop Paper

metadata version: 2022-05-20

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  - https://dblp.org/rec/conf/date/PrietoRQH97
Juan A. Prieto, Adoración Rueda, José M. Quintana, José Luis Huertas:
A performance-driven placement algorithm with simultaneous Place&Route optimization for analog ICs. ED&TC 1997: 389-394

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