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conf/isvlsi/GovindarajanB20 share record
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Keshav Govindarajan , V. S. Kanchana Bhaaskaran : Borrow Select Subtractor for Low Power and Area Efficiency. ISVLSI 2020 : 518-523 export record
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Prema Kumar Govindaswamy , Vijaya Sankara Rao Pasupureddi : A 27 -1 Low-Power Half-Rate 16-Gb/s Charge-Mode PRBS Generator in 1.2V, 65nm CMOS. ISVLSI 2020 : 212-215 share record
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Vladimir Herdt , Rolf Drechsler : Efficient Techniques to Strongly Enhance the Virtual Prototype Based Design Flow. ISVLSI 2020 : 182-187 share record
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Eric Homan , Chonghan Lee , Jack Sampson , John P. Sustersic , Vijaykrishnan Narayanan : DoubtNet: Using Semantic Context to Enable Adaptive Inference for the IoT. ISVLSI 2020 : 586-591 share record
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Sheikh Ariful Islam , Srinivas Katkoori : SafeController: Efficient and Transparent Control-Flow Integrity for RTL Design. ISVLSI 2020 : 270-275 share record
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Nandan Kumar Jha , Shreyas Ravishankar , Sparsh Mittal , Arvind Kaushik , Dipan Mandal , Mahesh Chandra : DRACO: Co-Optimizing Hardware Utilization, and Performance of DNNs on Systolic Accelerator. ISVLSI 2020 : 574-579 share record
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Amit Mahesh Joshi , Prateek Jain , Saraju P. Mohanty : Secure-iGLU: A Secure Device for Noninvasive Glucose Measurement and Automatic Insulin Delivery in IoMT Framework. ISVLSI 2020 : 440-445 share record
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Amit Mahesh Joshi , Prateek Jain , Saraju P. Mohanty : iGLU: Non-Invasive Device for Continuous Glucose Measurement with IoMT Framework. ISVLSI 2020 : 598-599 share record
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Hadi Mardani Kamali , Kimia Zamiri Azar , Houman Homayoun , Avesta Sasan : SCRAMBLE: The State, Connectivity and Routing Augmentation Model for Building Logic Encryption. ISVLSI 2020 : 153-159 share record
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Yirong Kan , Man Wu , Renyuan Zhang , Yasuhiko Nakashima : A Multi-grained Reconfigurable Accelerator for Approximate Computing. ISVLSI 2020 : 90-95 share record
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Alish Kanani , Jigar Mehta , Neeraj Goel : ACA-CSU: A Carry Selection Based Accuracy Configurable Approximate Adder Design. ISVLSI 2020 : 434-439 share record
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Mounika Kelam , Balaji Yadav Battu , Zia Abbas : A Compact, Power Efficient, Self-Adaptive and PVT Invariant CMOS Relaxation Oscillator. ISVLSI 2020 : 1-6 export record
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conf/isvlsi/KeramidasAVJCZF20 share record
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Georgios Keramidas , Christos P. Antonopoulos , Nikolaos S. Voros , Pekka Jääskeläinen , Marisa Catalán Cid , Evangelia I. Zacharaki , Apostolos P. Fournaris , Aris S. Lalos : CPSoSaware: Cross-Layer Cognitive Optimization Tools & Methods for the Lifecycle Support of Dependable CPSoS. ISVLSI 2020 : 470-475 share record
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Bokyung Kim , Hai Li : Leveraging 3D Vertical RRAM to Developing Neuromorphic Architecture for Pattern Classification. ISVLSI 2020 : 258-263 share record
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Khyati Kiyawat , Yutaka Masuda , Jun Shiomi , Tohru Ishihara : Real-Time Minimum Energy Point Tracking Using a Predetermined Optimal Voltage Setting Strategy. ISVLSI 2020 : 415-421 export record
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conf/isvlsi/KouloumprisTM20 share record
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Andreas Kouloumpris , Theocharis Theocharides , Maria K. Michael : Cost-Effective Time-Redundancy Based Optimal Task Allocation for the Edge-Hub-Cloud Systems. ISVLSI 2020 : 368-373 share record
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Rakesh Kumar , Bibhas Ghoshal : Classification and Workload Balancing of Multi-threaded Application on Embedded Platforms. ISVLSI 2020 : 568-573 share record
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Abraham Peedikayil Kuruvila , Shamik Kundu , Kanad Basu : Analyzing the Efficiency of Machine Learning Classifiers in Hardware-Based Malware Detectors. ISVLSI 2020 : 452-457 export record
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conf/isvlsi/KyrkouPKPLMT20 share record
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Christos Kyrkou , Andreas Papachristodoulou , Andreas Kloukiniotis , Andreas Papandreou , Aris S. Lalos , Konstantinos Moustakas , Theocharis Theocharides : Towards Artificial-Intelligence-Based Cybersecurity for Robustifying Automated Driving Systems Against Camera Sensor Attacks. ISVLSI 2020 : 476-481 export record
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conf/isvlsi/LeipnitzPPN20 share record
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Marcos T. Leipnitz , Murilo R. Perleberg , Marcelo Schiavon Porto , Gabriel L. Nazar : Enhancing Real-Time Motion Estimation through Approximate High-Level Synthesis. ISVLSI 2020 : 30-35 share record
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Yaguang Li , Yishuang Lin , Meghna Madhusudan , Arvind K. Sharma , Wenbin Xu , Sachin S. Sapatnekar , Ramesh Harjani , Jiang Hu : Exploring a Machine Learning Approach to Performance Driven Analog IC Placement. ISVLSI 2020 : 24-29 export record
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conf/isvlsi/MahmoudVACCH20 share record
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Abdulqader Nael Mahmoud , Frederic Vanderveken , Christoph Adelmann , Florin Ciubotaru , Sorin Cotofana , Said Hamdioui : 2-Output Spin Wave Programmable Logic Gate. ISVLSI 2020 : 60-65 export record
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conf/isvlsi/MatsuoSIOSN20 share record
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Ryosuke Matsuo , Jun Shiomi , Tohru Ishihara , Hidetoshi Onodera , Akihiko Shinya , Masaya Notomi : A Synthesis Method for Power-Efficient Integrated Optical Logic Circuits Towards Light Speed Processing. ISVLSI 2020 : 488-493 share record
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Shaun Miller : Quantum Resource Counts for Operations Constructed from an Addition Circuit. ISVLSI 2020 : 141-146 share record
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Manobendra Nath Mondal , Susmita Sur-Kolay , Bhargab B. Bhattacharya : Current Comparator-Based Reconfigurable Adder and Multiplier on Hybrid Memristive Crossbar. ISVLSI 2020 : 494-499 export record
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conf/isvlsi/NajibiHLZVA20 share record
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Halima Najibi , Jorge Hunter , Alexandre Levisse , Marina Zapater , Miroslav Vasic , David Atienza : Enabling Optimal Power Generation of Flow Cell Arrays in 3D MPSoCs with On-Chip Switched Capacitor Converters. ISVLSI 2020 : 18-23 share record
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Seungseok Nam , Emil Matús , Sadia Moriam , Gerhard P. Fettweis : Path-Spreading Search Algorithm and ASIP Approach for Connection Allocation in TDM-NoCs. ISVLSI 2020 : 102-107 share record
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Raunaq Nayar , Padmanabhan Balasubramanian , Douglas L. Maskell : Hardware Optimized Approximate Adder with Normal Error Distribution. ISVLSI 2020 : 84-89 share record
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Mohammadreza Esmali Nojehdeh , Levent Aksoy , Mustafa Altun : Efficient Hardware Implementation of Artificial Neural Networks Using Approximate Multiply-Accumulate Blocks. ISVLSI 2020 : 96-101 share record
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Amin Norollah , Zahra Kazemi , David Hély : 3D-Sorter: 3D Design of a Resource-Aware Hardware Sorter for Edge Computing Platforms Under Area and Energy Consumption Constraints. ISVLSI 2020 : 42-47