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ORCIDPeixin Zhong
Person information
- affiliation: Michigan State University, East Lansing, USA
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Journal Articles
- 1999
[j1]Peixin Zhong, Margaret Martonosi, Pranav Ashar, Sharad Malik
:
Using configurable computing to accelerate Boolean satisfiability. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(6): 861-868 (1999)
Conference and Workshop Papers
- 2006
- [c9]Jinwen Xi, Peixin Zhong:
A Transaction-Level NoC Simulation Platform with Architecture-Level Dynamic and Leakage Energy Models. ACM Great Lakes Symposium on VLSI 2006: 341-344 - [c8]Jinwen Xi, Peixin Zhong:
A System-level Network-on-Chip Simulation Framework Integrated with Low-level Analytical Models. ICCD 2006: 383-388 - 2005
- [c7]Zhaohui Huang, Peixin Zhong:
Adaptive Analog-to-Digital Converter Platform for Mixed-Signal System-on-Chip. ESA 2005: 69-73 - [c6]Jinwen Xi, Peixin Zhong:
Fast Energy Estimation of Multi-processor System-on-Chip with Energy Macro-Models for Embedded Microprocessors. MSV 2005: 107-111 - 2004
- [c5]Zhaohui Huang, Peixin Zhong:
An Architectural Power Estimator for Analog-to-Digital Converters. ICCD 2004: 397-400 - [c4]Jinwen Xi, Peixin Zhong:
Hardware/Software Co-Modeling of SAT Solver Based on Distributed Computing Elements using SystemC. ICCD 2004: 502-504 - 1998
- [c3]Peixin Zhong, Pranav Ashar, Sharad Malik, Margaret Martonosi:
Using Reconfigurable Computing Techniques to Accelerate Problems in the CAD Domain: A Case Study with Boolean Satisfiability. DAC 1998: 194-199 - [c2]Peixin Zhong, Margaret Martonosi, Pranav Ashar, Sharad Malik:
Accelerating Boolean Satisfiability with Configurable Hardware. FCCM 1998: 186-195 - [c1]Peixin Zhong, Margaret Martonosi, Pranav Ashar, Sharad Malik:
Solving Boolean Satisfiability with Dynamic Hardware Configurations. FPL 1998: 326-335
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