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Joseph Shor
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2020 – today
- 2024
- [j24]Edi Emanovic, Drazen Jurisic, Joseph Shor:
A Fully Integrated, Switched-Capacitor DC-DC Buck Converter Featuring an Inverter-Based Comparator. IEEE Access 12: 86425-86433 (2024) - [j23]Asaf Feldman, Omer Nechushtan, Joseph Shor:
Voltage Level Detection for Near-VTH Computing. IEEE J. Solid State Circuits 59(6): 1847-1857 (2024) - [j22]Yizhak Shifman, Joseph Shor:
An 11uW, 0.08 mm2, 125dB-Dynamic-Range Current-Sensing Dynamic CT Zoom ADC. IEEE Trans. Circuits Syst. I Regul. Pap. 71(8): 3489-3501 (2024) - 2023
- [c19]Asaf Feldman, Joseph Shor:
A 0.0106 mm2 8nW Resistor-Less BJT Bandgap Reference in 65nm. ESSCIRC 2023: 85-88 - 2022
- [j21]Yizhak Shifman, Inbal Stanger, Netanel Shavit, Ramiro Taco, Alexander Fish, Joseph Shor:
A Method for Mitigation of Droop Timing Errors Including a 500 MHz Droop Detector and Dual Mode Logic. IEEE J. Solid State Circuits 57(2): 596-608 (2022) - [j20]Ori Bass, Asaf Feldman, Joseph Shor:
A Resistor-Less nW-Level Bandgap Reference With Fine-Grained Voltage and Temperature Coefficient Trims. IEEE Open J. Circuits Syst. 3: 192-198 (2022) - [j19]Yizhak Shifman, Joseph Shor:
Preselection Methods to Achieve Very Low BER in SRAM-Based PUFs - A Tutorial. IEEE Trans. Circuits Syst. II Express Briefs 69(6): 2551-2556 (2022) - [j18]Yosef Lempel, Rinat Breuer, Joseph Shor:
A 700-μm², Ring-Oscillator-Based Thermal Sensor in 16-nm FinFET. IEEE Trans. Very Large Scale Integr. Syst. 30(2): 248-252 (2022) - [c18]Omer Nechushtan, Asaf Feldman, Joseph Shor:
A 385mV, 270nW, Accurate Voltage Level Detector for IoT. ESSCIRC 2022: 369-372 - [c17]Yizhak Shifman, Alexander Fish, Joseph Shor:
MirrorN PUF: Harvesting Multiple Independent Bits From Each PUF Cell in 65nm. ISCAS 2022: 2418-2422 - 2021
- [j17]Amir Mizrahi, Yizhak Shifman, Joseph Shor:
A 8800 μm² CCO-Based Voltage-Droop and Temperature Detector in 65 nm. IEEE Access 9: 114435-114440 (2021) - [j16]Liron Lisha, Ori Bass, Joseph Shor:
A 5800 μm² Process Monitor Circuit for Measurement of in-Die Variation of Vth in 65nm. IEEE Trans. Circuits Syst. II Express Briefs 68(3): 863-867 (2021) - [c16]Edi Emanovic, Joseph Shor, Drazen Jurisic:
An Inverter-Based, Ultra-Low Power, Fully Integrated, Switched-Capacitor DC-DC Buck Converter. ESSCIRC 2021: 359-362 - [c15]David Zagouri, Joseph Shor:
A Subthreshold Voltage Reference with Coarse- Fine Voltage Trimming. ISCAS 2021: 1-4 - 2020
- [j15]Natan Vinshtok-Melnik, Joseph Shor:
Ultra Miniature 1850 μm2 Ring Oscillator Based Temperature Sensor. IEEE Access 8: 91415-91423 (2020) - [j14]Yizhak Shifman, Avi Miller, Osnat Keren, Yoav Weizman, Joseph Shor:
A Method to Utilize Mismatch Size to Produce an Additional Stable Bit in a Tilting SRAM-Based PUF. IEEE Access 8: 219137-219150 (2020) - [j13]Yizhak Shifman, Avi Miller, Yoav Weizmann, Joseph Shor:
A 2 Bit/Cell Tilting SRAM-Based PUF With a BER of 3.1E-10 and an Energy of 21 FJ/Bit in 65nm. IEEE Open J. Circuits Syst. 1: 205-217 (2020) - [j12]Ori Bass, Joseph Shor:
A Miniaturized 0.003 mm2 PNP-Based Thermal Sensor for Dense CPU Thermal Monitoring. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(9): 2984-2992 (2020) - [j11]Ori Bass, Joseph Shor:
A Charge Balancing 1450 um2 PNP-Based Thermal Sensor for Dense Thermal Monitoring. IEEE Trans. Circuits Syst. 67-II(12): 2963-2967 (2020) - [j10]Yizhak Shifman, Avi Miller, Osnat Keren, Yoav Weizman, Joseph Shor:
An SRAM-Based PUF With a Capacitive Digital Preselection for a 1E-9 Key Error Probability. IEEE Trans. Circuits Syst. 67-I(12): 4855-4868 (2020)
2010 – 2019
- 2019
- [c14]Avi Miller, Yizhak Shifman, Yoav Weizman, Osnat Keren, Joseph Shor:
A Highly Reliable SRAM PUF with a Capacitive Preselection Mechanism and pre-ECC BER of 7.4E-10. CICC 2019: 1-4 - [c13]Yizhak Shifman, Avi Miller, Yoav Weizman, Alexander Fish, Joseph Shor:
An SRAM PUF with 2 Independent Bits/Cell in 65nm. ISCAS 2019: 1-5 - 2018
- [j9]Keith A. Bowman, Muhammad M. Khellah, Takashi Kono, Joseph Shor, Pui-In Mak:
Introduction to the January Special Issue on the 2017 IEEE International Solid-State Circuits Conference. IEEE J. Solid State Circuits 53(1): 3-7 (2018) - [j8]Anatoli Mordakhay, Joseph Shor:
Miniaturized, 0.01 mm2, Resistor-Based Thermal Sensor With an Energy Consumption of 0.9 nJ and a Conversion Time of 80 µs for Processor Applications. IEEE J. Solid State Circuits 53(10): 2958-2969 (2018) - [j7]Anatoli Mordakhay, Yevgeniy Telepinsky, Lior Klein, Joseph Shor, Alexander Fish:
A Low Noise Low Offset Readout Circuit for Magnetic-Random-Access-Memory. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(4): 1224-1233 (2018) - [c12]Ori Bass, Joseph Shor:
Ultra-Miniature 0.003 mm2 PNP-Based Thermal Sensor for CPU Thermal Monitoring. ESSCIRC 2018: 334-337 - 2017
- [c11]Natan Vinshtok-Melnik, Robert Giterman, Joseph Shor:
Ultra miniature offset cancelled bandgap reference with ±0.534% inaccuracy from -10°C to 110°C. ISCAS 2017: 1-4 - 2016
- [j6]Takao Oshita, Joseph Shor, David E. Duarte, Avner Kornfeld, George L. Geannopoulos, Jonathan Douglas, Nasser A. Kurd:
A Compact First-Order ΣΔ Modulator for Analog High-Volume Testing of Complex System-on-Chips in a 14 nm Tri-Gate Digital CMOS Process. IEEE J. Solid State Circuits 51(2): 378-390 (2016) - [j5]Kosta Luria, Joseph Shor, Michael Zelikson, Alex Lyakhov:
Dual-Mode Low-Drop-Out Regulator/Power Gate With Linear and On-Off Conduction for Microprocessor Core On-Die Supply Voltages in 14 nm. IEEE J. Solid State Circuits 51(3): 752-762 (2016) - [j4]Joseph Shor, Dror Zilberman:
An Accurate Bandgap-Based Power-on-Detector in 14-nm CMOS Technology. IEEE Trans. Circuits Syst. II Express Briefs 63-II(5): 428-432 (2016) - [c10]Yong Ping Xu, Joseph Shor:
Session 11 overview: Sensors and displays. ISSCC 2016: 198-199 - 2015
- [j3]Takao Oshita, Joseph Shor, David E. Duarte, Avner Kornfeld, Dror Zilberman:
Compact BJT-Based Thermal Sensor for Processor Applications in a 14 nm tri-Gate CMOS Process. IEEE J. Solid State Circuits 50(3): 799-807 (2015) - [c9]Kosta Luria, Joseph Shor, Michael Zelikson, Alex Lyakhov:
8.7 Dual-use low-drop-out regulator/power gate with linear and on-off conduction modes for microprocessor on-die supply voltages in 14nm. ISSCC 2015: 1-3 - 2013
- [j2]Joseph S. Shor, Kosta Luria:
Miniaturized BJT-Based Thermal Sensor for Microprocessors in 32- and 22-nm Technologies. IEEE J. Solid State Circuits 48(11): 2860-2867 (2013) - 2012
- [j1]Marcelo Yuffe, Moty Mehalel, Ernest Knoll, Joseph Shor, Tsvika Kurts, Eran Altshuler, Eyal Fayneh, Kosta Luria, Michael Zelikson:
A Fully Integrated Multi-CPU, Processor Graphics, and Memory Controller 32-nm Processor. IEEE J. Solid State Circuits 47(1): 194-205 (2012) - [c8]Joseph Shor, Kosta Luria, Dror Zilberman:
Ratiometric BJT-based thermal sensor in 32nm and 22nm technologies. ISSCC 2012: 210-212 - 2011
- [c7]Marcelo Yuffe, Ernest Knoll, Moty Mehalel, Joseph Shor, Tsvika Kurts:
A fully integrated multi-CPU, GPU and memory controller 32nm processor. ISSCC 2011: 264-266 - 2010
- [c6]Joseph Shor:
Low noise linear voltage regulator for use as an on-chip PLL supply in microprocessors. ISCAS 2010: 841-844 - [c5]Kosta Luria, Joseph Shor:
Miniaturized CMOS thermal sensor array for temperature gradient measurement in microprocessors. ISCAS 2010: 1855-1858
2000 – 2009
- 2003
- [c4]Joseph S. Shor, Yan Polansky, Yaen Yaacov Sofer, Eduardo Maayan:
Self-regulated four-phased charge pump with boosted wells. ISCAS (1) 2003: 241-244 - 2002
- [c3]Joseph S. Shor, Yair Sofer, Yan Polansky, Eduardo Maayan:
Low power voltage regulator for EPROM applications. ISCAS (4) 2002: 576-579
1990 – 1999
- 1999
- [c2]Joseph S. Shor, Vladimir Koifman, Yachin Afek:
Novel method to compensate for resistor non-linearities and its application to the integration of analog functions on system-on-a-chip ICs. ISCAS (2) 1999: 294-297 - [c1]Vladimir Koifman, Yachin Afek, Joseph Shor:
Circuit methods for the integration of low voltage (1.1-1.8V) analog functions on system-on-a-chip IC's in a single-poly CMOS processes. ISLPED 1999: 60-63
Coauthor Index
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last updated on 2024-10-07 22:10 CEST by the dblp team
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