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Journal Articles
- 2013
[j5]Hyung Seok Kim, Carlos Ornelas, Kailash Chandrashekar, Dan Shi, Pin-en Su, Paolo Madoglio, Yee William Li, Ashoke Ravi:
A Digital Fractional-N PLL With a PVT and Mismatch Insensitive TDC Utilizing Equivalent Time Sampling Technique. IEEE J. Solid State Circuits 48(7): 1721-1729 (2013)- 2009
- [j4]Hasnain Lakdawala, Y. William Li, Arijit Raychowdhury, Greg Taylor, Krishnamurthy Soumyanath:
A 1.05 V 1.6 mW, 0.45°C 3σ Resolution ΣΔ Based Temperature Sensor With Parasitic Resistance Compensation in 32 nm Digital CMOS Process. IEEE J. Solid State Circuits 44(12): 3621-3630 (2009) - 2006
- [j3]Yee William Li, Kenneth L. Shepard, Yannis P. Tsividis:
A Continuous-Time Programmable Digital FIR Filter. IEEE J. Solid State Circuits 41(11): 2512-2520 (2006) - 2004
- [j2]George Patounakis, Yee William Li, Kenneth L. Shepard:
A fully integrated on-chip DC-DC conversion and power management system. IEEE J. Solid State Circuits 39(3): 443-451 (2004) - [j1]Yee William Li, George Patounakis, Kenneth L. Shepard, Steven M. Nowick:
High-throughput asynchronous datapath with software-controlled voltage scaling. IEEE J. Solid State Circuits 39(4): 704-708 (2004)
Conference and Workshop Papers
- 2017
- [c9]Paolo Madoglio, Hongtao Xu, Kailash Chandrashekar, Luis Cuellar, Muhammad Faisal, Yee William Li, Hyung Seok Kim, Khoa Minh Nguyen, Yulin Tan, Brent R. Carlton, Vaibhav A. Vaidya, Yanjie Wang, Thomas Tetzlaff, Satoshi Suzuki, Amr Fahim, Parmoon Seddighrad, Jianyong Xie, Zhichao Zhang, Divya Shree Vemparala, Ashoke Ravi, Stefano Pellerano, Yorgos Palaskas:
13.6 A 2.4GHz WLAN digital polar transmitter with synthesized digital-to-time converter in 14nm trigate/FinFET technology for IoT and wearable applications. ISSCC 2017: 226-227 - 2012
- [c8]Hyung Seok Kim, Carlos Ornelas, Kailash Chandrashekar, Pin-en Su, Paolo Madoglio, Yee William Li, Ashoke Ravi:
A digital fractional-N PLL with a 3mW 0.004mm2 6-bit PVT and mismatch insensitive TDC. ESSCIRC 2012: 193-196 - [c7]Y. William Li, Carlos Ornelas, Hyung Seok Kim, Hasnain Lakdawala, Ashoke Ravi, Krishnamurthy Soumyanath:
A reconfigurable distributed all-digital clock generator core with SSC and skew correction in 22nm high-k tri-gate LP CMOS. ISSCC 2012: 70-72 - 2011
- [c6]Y. William Li, Hasnain Lakdawala:
Smart integrated temperature sensor - mixed-signal circuits and systems in 32-nm and beyond. CICC 2011: 1-8 - 2009
- [c5]Y. William Li, Hasnain Lakdawala, Arijit Raychowdhury, Greg Taylor, Krishnamurthy Soumyanath:
A 1.05V 1.6mW 0.45°C 3σ-resolution ΔΣ-based temperature sensor with parasitic-resistance compensation in 32nm CMOS. ISSCC 2009: 340-341 - 2005
- [c4]Yee William Li, Kenneth L. Shepard, Yannis P. Tsividis:
Continuous-Time Digital Signal Processors. ASYNC 2005: 138-143 - [c3]Yee William Li, Kenneth L. Shepard, Yannis P. Tsividis:
A continuous-time programmable digital FIR filter. CICC 2005: 695-698 - [c2]Yannis P. Tsividis, Glenn E. R. Cowan, Yee William Li, Kenneth L. Shepard:
Continuous-time DSPs, analog/digital computers and other mixed-domain circuits. ESSCIRC 2005: 113-116 - 2003
- [c1]Yee William Li, George Patounakis, Anup P. Jose, Kenneth L. Shepard, Steven M. Nowick:
Asynchronous Datapath with Software-Controlled On-Chip Adaptive Voltage Scaling for Multirate Signal Processing Application. ASYNC 2003: 216-226
Coauthor Index
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last updated on 2024-04-25 02:16 CEST by the dblp team
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