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Peter Malík
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2020 – today
- 2024
- [j8]Jaromír Klarák, Robert Andok, Peter Malík, Ivan Kuric, Mário Ritomský, Ivana Klacková, Hung-Yin Tsai:
From Anomaly Detection to Defect Classification. Sensors 24(2): 429 (2024) - 2023
- [j7]Tomas Rusnak, Tomás Kasanický, Peter Malík, Ján Mojzis, Ján Zelenka, Michal Svicek, Dominik Abrahám, Andrej Halabuk:
Crop Mapping without Labels: Investigating Temporal and Spatial Transferability of Crop Classification Models Using a 5-Year Sentinel-2 Series and Machine Learning. Remote. Sens. 15(13): 3414 (2023) - 2021
- [c14]Stefan Kristofík, Matús Kasás, Peter Malík:
StarCraft strategy classification of a large human versus human game replay dataset. FedCSIS 2021: 137-140 - 2020
- [c13]Stefan Kristofík, Matús Kasás, Stefan Neupauer, Peter Malík:
StarCraft agent strategic training on a large human versus human game replay dataset. FedCSIS 2020: 391-399 - [c12]Peter Malík, Kristína Knapová, Stefan Kristofík:
Instance Segmentation Model Created from Three Semantic Segmentations of Mask, Boundary and Centroid Pixels Verified on GlaS Dataset. FedCSIS 2020: 569-576 - [p1]Peter Malík, Stefan Kristofík:
AI Architectures for Very Smart Sensors. Convergence of Artificial Intelligence and the Internet of Things 2020: 391-439
2010 – 2019
- 2019
- [j6]Giang Nguyen, Stefan Dlugolinsky, Martin Bobák, Viet D. Tran, Álvaro López García, Ignacio Heredia, Peter Malík, Ladislav Hluchý:
Machine Learning and Deep Learning frameworks and libraries for large-scale data mining: a survey. Artif. Intell. Rev. 52(1): 77-124 (2019) - [j5]Ondrej Kachman, Marcel Baláz, Peter Malík:
Universal framework for remote firmware updates of low-power devices. Comput. Commun. 139: 91-102 (2019) - 2018
- [j4]Stefan Kristofík, Peter Malík:
Enhancement of fault collection for embedded RAM redundancy analysis considering intersection and orphan faults. Integr. 62: 190-204 (2018) - [j3]Stefan Kristofík, Marcel Baláz, Peter Malík:
Hardware redundancy architecture based on reconfigurable logic blocks with persistent high reliability improvement. Microelectron. Reliab. 86: 38-53 (2018) - 2016
- [j2]Peter Malík:
Dedicated Hardware for Complex Mathematical Operations. Comput. Informatics 35(6): 1438-1466 (2016) - [c11]Peter Malík:
Natural logarithm and division floating-point high throughput co-processor implemented in FPGA. NORCAS 2016: 1-6 - 2015
- [c10]Peter Malík:
High Throughput Floating-Point Dividers Implemented in FPGA. DDECS 2015: 291-294 - [c9]Peter Malík:
High Throughput Floating Point Exponential Function Implemented in FPGA. ISVLSI 2015: 97-100 - 2014
- [c8]Peter Malík:
Dedicated hardware architecture for object tracking preprocessing implemented in FPGA. DDECS 2014: 250-253 - 2011
- [j1]Peter Malík:
Highly scalable IP core to accelerate the forward/backward modified discrete cosine transform in MP3 implemented to FPGA and low-power ASIC. IET Circuits Devices Syst. 5(5): 351-359 (2011)
2000 – 2009
- 2009
- [c7]Peter Malík, Michal Ufnal, Arkadiusz W. Luczyk, Marcel Baláz, Witold A. Pleskacz:
MDCT / IMDCT low power implementations in 90 nm CMOS technology for MP3 audio. DDECS 2009: 144-147 - 2008
- [c6]Peter Malík, Marcel Baláz, Martin Simlastík, Arkadiusz W. Luczyk, Witold A. Pleskacz:
Various MDCT implementations in 0.35µm CMOS. DDECS 2008: 170-173 - 2007
- [c5]Peter Malík, Marcel Baláz, Tomás Pikula, Martin Simlastík:
An Improved MDCT IP Core Generator with Architectural Model Simulation. DDECS 2007: 193-198 - [c4]Martin Simlastík, Viera Stopjaková, Libor Majer, Peter Malík:
Clockless Implementation of LEON2 for Low-Power Applications. DDECS 2007: 215-218 - [c3]Peter Malík:
A Generic IP Core of the Identical Forward and Inverse 12/36-Point MDCT Architecture and an Architectural Model Simulation Toolbox. ICECS 2007: 709-712 - 2006
- [c2]Martin Simlastík, Peter Malík, Tomás Pikula, Marcel Baláz:
FPGA Implementation of a Fast MDCT Algorithm. DDECS 2006: 228-229 - [c1]Peter Malík, Marcel Baláz, Tomás Pikula, Martin Simlastík:
MDCT IP Core Generator with Architectural Model Simulation. VLSI-SoC 2006: 18-23
Coauthor Index
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last updated on 2024-04-24 23:09 CEST by the dblp team
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