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Bing-Yu Hsieh
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2000 – 2009
- 2008
- [c13]Ping-Ying Wang, Jing-Hong Conan Zhan, Hsiang-Hui Chang, Bing-Yu Hsieh:
An analog enhanced all digtial RF fractional-N PLL with self-calibrated capability. CICC 2008: 749-752 - [c12]Hsiang-Hui Chang, Ping-Ying Wang, Jing-Hong Conan Zhan, Bing-Yu Hsieh:
A Fractional Spur-Free ADPLL with Loop-Gain Calibration and Phase-Noise Cancellation for GSM/GPRS/EDGE. ISSCC 2008: 200-201 - 2006
- [j6]Tung-Chien Chen, Yu-Wen Huang, Chuan-Yung Tsai, Bing-Yu Hsieh, Liang-Gee Chen:
Architecture Design of Context-Based Adaptive Variable-Length Coding for H.264/AVC. IEEE Trans. Circuits Syst. II Express Briefs 53-II(9): 832-836 (2006) - [j5]Yu-Wen Huang, Bing-Yu Hsieh, Shao-Yi Chien, Shyh-Yih Ma, Liang-Gee Chen:
Analysis and complexity reduction of multiple reference frames motion estimation in H.264/AVC. IEEE Trans. Circuits Syst. Video Technol. 16(4): 507-522 (2006) - [j4]Shao-Yi Chien, Bing-Yu Hsieh, Yu-Wen Huang, Shyh-Yih Ma, Liang-Gee Chen:
Hybrid Morphology Processing Unit Architecture for Moving Object Segmentation Systems. J. VLSI Signal Process. 42(3): 241-255 (2006) - [c11]Jyh-Shin Pan, Hao-Cheng Chen, Bing-Yu Hsieh, Hong-Ching Chen, Roger Lee, Ching-Ho Chu, Yuan-Chin Liu, Chuan Liu, Lily Huang, Chang-Long Wu, Meng-Hsueh Lin, Chun-Yiu Lin, Shang-Nien Tsai, Jenn-Ning Yang, Chang-Po Ma, Yung Cheng, Shu-Hung Chou, Hsiu-Chen Peng, Peng-Chuan Huang, Benjamin Chiu, Alex Ho:
A CMOS SoC for 56/18/16 CD/DVD-dual/RAM applications. DAC 2006: 290-291 - [c10]Jyh-Shin Pan, Tse-Hsiang Hsu, Hao-Cheng Chen, Jong-Woei Chen, Bing-Yu Hsieh, Hong-Ching Chen, Wei-Hsuan Tu, Chi-Ming Chang, Roger Lee, Ching-Ho Chu, Yuan-Chin Liu, Chuan-Cheng Hsiao, Chuan Liu, Lily Huang, Chia-Hua Chou, Chang-Long Wu, Meng-Hsueh Lin, Shang-Ping Chen, Brian Liu, Heng-Shou Hsu, Chun-Yiu Lin, Shang-Nien Tsai, Jenn-Ning Yang, Sean Chien, Kuan-Hua Chao, Chang-Po Ma, Yung Cheng, Shu-Hung Chou, Yih-Shin Weng, Ming-Shiam Tsai, Kun-Hung Hsieh, Kuang-Jung Chang, Jin-Chuan Hsu, Hsiu-Chen Peng, Alex Ho:
Fully Integrated CMOS SoC for 56/18/16 CD/DVD-dual/RAM Applications with On-Chip 4-LVDS Channel WSG and 1.5Gb/s SATA PHY. ISSCC 2006: 1022-1031 - 2005
- [j3]Yu-Wen Huang, Bing-Yu Hsieh, Tung-Chien Chen, Liang-Gee Chen:
Analysis, fast algorithm, and VLSI architecture design for H.264/AVC intra frame coder. IEEE Trans. Circuits Syst. Video Technol. 15(3): 378-401 (2005) - 2004
- [j2]Yu-Wen Huang, Shao-Yi Chien, Bing-Yu Hsieh, Liang-Gee Chen:
Global elimination algorithm and architecture design for fast block matching motion estimation. IEEE Trans. Circuits Syst. Video Technol. 14(6): 898-907 (2004) - [j1]Shao-Yi Chien, Yu-Wen Huang, Bing-Yu Hsieh, Shyh-Yih Ma, Liang-Gee Chen:
Fast video segmentation algorithm with shadow cancellation, global motion compensation, and adaptive threshold techniques. IEEE Trans. Multim. 6(5): 732-748 (2004) - [c9]Yu-Wen Huang, Bing-Yu Hsieh, Tung-Chien Chen, Liang-Gee Chen:
Hardware architecture design for H.264/AVC intra frame coder. ISCAS (2) 2004: 269-272 - 2003
- [c8]Yu-Wen Huang, Bing-Yu Hsieh, Tu-Chih Wang, Shao-Yi Chien, Shyh-Yih Ma, Chun-Fu Shen, Liang-Gee Chen:
Analysis and reduction of reference frames for motion estimation in MPEG-4 AVC/JVT/H.264. ICASSP (3) 2003: 145-148 - [c7]Yu-Wen Huang, To-Wei Chen, Bing-Yu Hsieh, Tu-Chih Wang, Te-Hao Chang, Liang-Gee Chen:
Architecture design for deblocking filter in H.264/JVT/AVC. ICME 2003: 693-696 - [c6]Yu-Wen Huang, Bing-Yu Hsieh, Tu-Chih Wang, Shao-Yi Chien, Shyh-Yih Ma, Chun-Fu Shen, Liang-Gee Chen:
Analysis and reduction of reference frames for motion estimation in MPEG-4 AVC/JVT/H.264. ICME 2003: 809-812 - [c5]Yu-Wen Huang, Tu-Chih Wang, Bing-Yu Hsieh, Liang-Gee Chen:
Hardware architecture design for variable block size motion estimation in MPEG-4 AVC/JVT/ITU-T H.264. ISCAS (2) 2003: 796-799 - [c4]Bing-Yu Hsieh, Yu-Wen Huang, Tu-Chih Wang, Shao-Yi Chien, Liang-Gee Chen:
Fast motion estimation algorithm for H.264/MPEG-4 AVC by using multiple reference frame skipping criteria. VCIP 2003: 1551-1560 - 2002
- [c3]Yu-Wen Huang, Shao-Yi Chien, Bing-Yu Hsieh, Liang-Gee Chen:
An efficient and low power architecture design for motion estimation using global elimination algorithm. ICASSP 2002: 3120-3123 - [c2]Yu-Wen Huang, Bing-Yu Hsieh, Shao-Yi Chien, Liang-Gee Chen:
Simple and effective algorithm for automatic tracking of a single object using a pan-tilt-zoom camera. ICME (1) 2002: 789-792 - [c1]Yu-Wen Huang, Shao-Yi Chien, Bing-Yu Hsieh, Liang-Gee Chen:
Automatic threshold decision of background registration technique for video segmentation. VCIP 2002: 552-563
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