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ORCIDISCAS 2003: Bangkok, Thailand - Volume 2
- Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003. IEEE 2003, ISBN 0-7803-7761-3
- Minfen Shen, Francis H. Y. Chan, Patch Beadle:
A method for generating non-Gaussian noise series with specified probability distribution and power spectrum. 1-4 - Shang-Ho Tsai, Yuan-Pei Lin:
Performance evaluation of optimal DMT transceivers for ADSL application. 5-8 - Honghui Xu, Soura Dasgupta, Zhi Ding:
A novel channel identification method for fast wireless communication systems with transmitter and receiver diversity. 9-12 - Piya Kovintavewat, John R. Barry, Mehmet Fatih Erden, Erozan M. Kurtas:
A new timing recovery architecture for fast convergence. 13-16 - Yuanjin Zheng:
A novel channel estimation and tracking method for wireless OFDM systems based on pilots and Kalman filtering. 17-20 - Wei-Ping Zhu, Yupeng Yan, M. Omair Ahmad, M. N. S. Swamy:
A feedforward timing recovery scheme using two samples per symbol: algorithm, performance and implementation issues. 21-24 - Wei-Ping Zhu, M. Omair Ahmad, M. N. S. Swamy:
Joint carrier and frame synchronization for MPSK demodulation. 25-28 - Sara Escalera, Carlos M. Domínguez-Matas, José M. García-González, Oscar Guerra, Ángel Rodríguez-Vázquez:
On the development of a MODEM for data transmission and control of electrical household appliances using the low-voltage power-line. 29-32 - Jongsun Kim, Zhiwei Xu, Mau-Chung Frank Chang:
Reconfigurable memory bus systems using multi-Gbps/pin CDMA I/O transceivers. 33-36 - Gian Carlo Cardarilli, Andrea Del Re, Marco Re:
IP based reconfigurable digital platform for satellite communications. 37-40 - Andrea Pacifici, C. Vendetti, Fabrizio Frescura, Saverio Cacopardi:
A reconfigurable channel codec coprocessor for software radio multimedia applications. 41-44 - Ronny Veljanovski, Aleksandar Stojcevski, Jugdutt Singh, Mike Faulkner, Aladin Zayegh:
A highly efficient reconfigurable architecture for an UTRA-TDD mobile station receiver. 45-48 - Chi-Fang Li, Wern-Ho Sheen, Fu-Chang Chuang, Yuan-Sun Chu:
Configurable preamble synchronizer for slotted random access in W-CDMA applications. 49-52 - Zhongfeng Wang, Yiyan Tang, Yuke Wang:
Low hardware complexity parallel turbo decoder architecture. 53-56 - Mohammad M. Mansour, Naresh R. Shanbhag:
Architecture-aware low-density parity-check codes. 57-60 - Anand Selvarathinam, Gwan Choi, Krishna Narayanan, Achal Prabhakar, Euncheol Kim:
A massively scaleable decoder architecture for low-density parity-check codes. 61-64 - Jaeyoung Kwak, Sook Min Park, Sang-Sic Yoon, Kwyro Lee:
Implementation of a parallel turbo decoder with dividable interleaver. 65-68 - Yun-Nan Chang:
Design of soft-output Viterbi decoders with hybrid trace-back processing. 69-72 - Dimitrios Soudris, Marios Kesoulis, Christos S. Koukourlis, Adonios Thanailakis, Spyros Blionas:
Alternative Direct Digital Frequency Synthesizer architectures with reduced memory size. 73-76 - K. I. Palomaki, Jarkko Niittylahti:
A low-power, memoryless direct digital frequency synthesizer architecture. 77-80 - Florean Curticapean, K. I. Palomaki, Jarkko Niittylahti:
Quadrature direct digital frequency synthesizer using an angle rotation algorithm. 81-84 - César Caballero-Gaudes, Mikko Valkama, Markku Renfors:
A novel frequency synthesizer concept for wireless communications. 85-88 - Jaakko Ketola, Jouko Vankka, Kari Halonen:
Synchronization of fractional interval counter in non-integer ratio sample rate converters. 89-92 - Ioannis Papaefstathiou, Helen-Catherine Leligou, Theofanis Orphanoudakis, George Kornaros, Nicholaos Zervos, George E. Konstantoulakis:
An innovative scheduling scheme for high-speed network processors. 93-96 - George Kornaros, Theofanis Orphanoudakis, Ioannis Papaefstathiou:
Active flow identifiers for scalable, QoS scheduling in 10-Gbps network processors. 97-100 - Dongliang Guan, Songyu Yu:
An improved link price algorithm for Internet flow control. 101-104 - Shridhar Mubaraq Mishra, A. Guruprasad, Chun Feng Hu, Pramod K. Pandey, Ming Hung:
Wire-speed traffic management in Ethernet switches. 105-108 - Fethi Tlili, Fatma Rouissi, Adel Ghazel:
Precoded OFDM for power line broadband communication. 109-112 - Ilkka Saastamoinen, M. Alho, Jari Nurmi:
Buffer implementation for Proteo network-on-chip. 113-116 - Wai-Chi Fang, Anand Sethuraman, K. Belevi:
VLSI design of turbo decoder for integrated communication system-on-chip applications. 117-120 - Jen-Chih Kuo, Ching-Hua Wen, An-Yeu Wu:
Implementation of a programmable 64~2048-point FFT/IFFT processor for OFDM-based communication systems. 121-124 - Eleni Fotopoulou, Vassilis Paliouras, Thanos Stouraitis:
A computational technique and a VLSI architecture for digital pulse shaping in OFDM modems. 125-128 - Chao-Kai Chang, Chung-Ping Hung, Sau-Gee Chen:
An efficient memory-based FFT architecture. 129-132 - Jaehyun Baek, Byung S. Son, Byung G. Jo, Myung Hoon Sunwoo, Seung Keun Oh:
A continuous flow mixed-radix FFT architecture with an in-place algorithm. 133-136 - Chien-Ming Wu, Ming-Der Shieh, Hsin-Fu Lo, Min-Hsiung Hu:
Implementation of channel demodulator for DAB system. 137-140 - T. Jitrangsri, Suvepon Sittichivapak:
Enhancement of data transmission in OFDM-WLAN system using transmit diversity. 141-144 - Yik-Chung Wu, Kun-Wah Yip, Tung-Sang Ng:
ML frame synchronization for IEEE 802.11a WLANs on multipath Rayleigh fading channels. 145-148 - Hsuan-Yu Liu, Yi-Hsin Yu, Chien-Jen Hung, Temg-Yin Hsu, Chen-Yi Lee:
Combining adaptive smoothing and decision-directed channel estimation schemes for OFDM WLAN systems. 149-152 - Hsin-Lei Lin, Robert Chen-Hao Chang, Chih-Hao Huang, Hongchin Lin:
A flexible design of a decision feedback equalizer and a novel CCK technique for wireless LAN systems. 153-156 - Adesh Garg, Ian Steiner, Graham A. Jullien, James W. Haslett, G. H. McGibney:
A high speed complex adaptive filter for an asymmetric wireless LAN using a new quantized polynomial representation. 157-160 - Magnus Wiklund, Stefan Nilsson, Christian Bjork, Sven Mattisson:
A 2GHz image-reject receiver in a low IF architecture fabricated in a 0.1µm CMOS technology. 161-164 - Yuanjin Zheng, C. B. Terry:
Self tuned fully integrated high image rejection low IF receivers: architecture and performance. 165-168 - Sami Karvonen, Thomas A. D. Riley, Juha Kostamovaara:
A complex charge sampling scheme for complex IF receivers. 169-172 - Miguel Ângelo M. Madureira, Paulo M. P. Monteiro, Rui L. Aguiar, Manuel Violas, M. Gloanec, E. Leclerc, Bernard Lefebvre:
High gain GaAs 10Gbps transimpedance amplifier with integrated bondwire effects. 173-176 - Kari Stadius, Arto Malinen, Petteri Paatsila, Kari Halonen:
A broadband upconverter unit for double-conversion receivers. 177-180 - M. Ramezani, C. André T. Salama:
A 10Gb/s CDR with a half-rate bang-bang phase detector. 181-184 - W. K. Yeung, Cheong-Fat Chan, Chiu-sing Choy, Kong-Pang Pun:
Clock recovery circuit with adiabatic technology (quasi-static CMOS logic). 185-187 - Baoyong Chi, Bingxue Shi:
A 1.8V 2.4GHz CMOS on-chip impedance matching low noise amplifier for WLAN applications. 188-191 - Guangbin Zhang, Jin Liu, Sungyong Jung:
An accurate current source with on-chip self-calibration circuits for low-voltage differential transmitter drivers. 192-195 - Kuo-Hsing Cheng, Yu-Lung Lo, Wen Fang Yu:
A mixed-mode delay-locked loop for wide-range operation and multiphase outputs. 196-199 - Jouni Kaukovuori, Mikko Hotti, Jussi Ryynänen, Jarkko Jussila, Kari Halonen:
A linearized 2-GHz SiGe low noise amplifier for direct conversion receiver. 200-203 - Michael M. Green, Ullas Singh:
Design of CMOS CML circuits for high-speed broadband communications. 204-207 - Payam Heydari, Ravindran Mohanavelu:
Design of ultra high-speed CMOS CML buffers and latches. 208-211 - Ghasem Azemi, Bouchra Senadji, Boualem Boashash:
A novel estimator for the velocity of a mobile station in a micro-cellular system. 212-215 - N. Christoffers, Rainer Kokozinski
, Stephan Kolnsberg, Bedrich J. Hosticka:
High loop-filter-order ΣΔ-fractional-n frequency synthesizers for use in frequency-hopping-spread-spectrum communication-systems. 216-219 - J. Yang, Y. Sun, John M. Senior, N. Pem:
Channel estimation for wireless communications using space-time block coding techniques. 220-223 - Kainam Thomas Wong, S. L. A. Chan, Rafael P. Torres:
Fast-polarization-hopping transmit-diversity to mitigate prolonged deep fades. 224-227 - A. S. Madhukumar, Z. Guo Ping, T. Kian Seng, Y. Kuck Jong, Tim Mingqian Zhong, T. Y. Hong, Francois P. S. Chin:
Space-time equalizer for advanced 3GPP WCDMA mobile terminal: experimental results. 228-231 - A. S. Madhukumar, Francois P. S. Chin, Ying-Chang Liang:
A novel pilot structure for the downlink transmission of cyclic prefix assisted single carrier CDMA system with frequency domain equalisation. 232-235 - Yajun Kou, Wu-Sheng Lu, Andreas Antoniou:
Peak-to-average power-ratio reduction via channel hopping for downlink CDMA systems. 236-239 - Shinsaku Shimizu, Toshimasa Matsuoka, Kenji Taniguchi:
Parallel bus systems using code-division multiple access technique. 240-243 - Triratana Metkarunchit, Prasit Prapinmongkolkarn:
High performance DS-CDMA system using novel SC-I chip shaping. 244-247 - T. S. L. Goh, Roger D. Pollard:
Predicting CDMA spectral regrowth using a general statistical behavioural model for power amplifiers with memory effects. 248-251 - Chang Hoon Kim, Soonhak Kwon, Chun Pyo Hong, In-Gil Nam:
Efficient bit-serial systolic array for division over GF(2m). 252-255 - Yin-Tsung Hwang, Kuo-Wei Liao, Chien-Hsing Wu:
FPGA realization of an OFDM frame synchronization design for dispersive channels. 256-259 - Francisco Cardells-Tormo, Javier Valls-Coquillat:
Quadrature direct digital frequency synthesizers: area-optimized design map for LUT-based FPGAs. 260-263 - Yiqun Zhu, Mohammed Benaissa:
A novel ACS scheme for area-efficient Viterbi decoders. 264-267 - Cornelia Grabbe, Marcus Bednara, Jürgen Teich, Joachim von zur Gathen, Jamshid Shokrollahi:
FPGA designs of parallel high performance GF(2233) multipliers. 268-271 - Matthias Kamuf, John B. Anderson, Viktor Öwall:
Providing flexibility in a convolutional encoder. 272-275 - Man Guo, M. Omair Ahmad, M. N. S. Swamy, Chunyan Wang:
A low-power systolic array-based adaptive Viterbi decoder and its FPGA implementation. 276-279 - Jaeyoung Kwak, Sook Min Park, Kwyro Lee:
Reverse tracing of forward state metric in Log-Map and MAX-Log-MAP decoders. 280-283 - Armin Tajalli, Seyed Mojtaba Atarodi:
Structured design of an integrated subscriber line interface system and circuit. 284-287 - Georg Konstanznig, Andreas Springer, Robert Weigel:
A low power 4.3 GHz phase-locked loop with advanced dual-mode tuning technique including I/Q-signal generation in 0.12µm standard CMOS. 288-291 - Esdras Juárez-Hernández, Alejandro Díaz-Sánchez, Esteban Tlelo-Cuautle:
A 1.35 GHz CMOS wideband frequency synthesizer for mobile communications. 292-295 - Xiaofeng Lin, Jin Liu:
A CMOS analog continuous-time FIR filter for 1Gbps cable equalizer. 296-299 - Vojkan Vidojkovic, Johan van der Tang, Arjan J. Leeuwenburgh, Arthur H. M. van Roermund:
Mixer topology selection for a 1.8 - 2.5 GHz multi-standard front-end in 0.18µm CMOS. 300-303 - Chun-Nan Chen, Kuan-Hung Chen, Tzi-Dar Chiueh:
Algorithm and architecture design for a low-complexity adaptive equalizer. 304-307 - Chun Kit Hung, Mounir Hamdi, Chi-Ying Tsui:
Design and implementation of high-speed arbiter for large scale VOQ crossbar switches. 308-311 - Zhenhua Wang:
A virtually jitter-free fractional-N divider for a Bluetooth radio. 312-315 - Sotoudeh Humedi-Hugh, C. André T. Salama:
A novel C-band CMOS phase shifter for communication systems. 316-319 - Hanho Lee:
High-speed VLSI architecture for parallel Reed-Solomon decoder. 320-323 - K. Lertsirimit:
Modified reduced dimensionality channel model. 324-327 - Anthony G. K. C. Lim, Guo-Qing Wang, Victor Sreeram:
Adaptive digital compensation in DSP based FM modulators. 328-331 - Hsin-Yung Wang, Shyue-Win Wei:
A window-gate for the echo canceller of DMT ADSL. 332-335 - B. Siddik Yarman, Ahmet Aksen, Ebru Gürsu Çimen:
Design and simulation of miniaturized communication systems employing symmetrical lossless two-ports constructed with two kinds of elements. 336-339 - S. Suwantragul, P. Rakariyatham, Tharadol Komolmis, Akachai Sang-In:
A modelling of ionospheric delay over Chiang Mai province. 340-343 - Kun-Wah Yip, Yik-Chung Wu, Tung-Sang Ng:
A new multiplierless correlator for timing synchronization in IEEE 802.11a WLANs. 344-347 - Daorat Kerdlapanan, Akharin Khunkitti:
Content-based load balancing with multicast and TCP-handoff. 348-351 - Nikolaos Papandreou, Theodore Antonakopoulos:
Cooperative bit-loading and fairness bandwidth allocation in ADSL systems. 352-355 - Chunjiang J. Duanmu, M. Omair Ahmad, M. N. S. Swamy:
A continuous tracking algorithm for long-term memory motion estimation. 356-359 - Jizheng Xu, Qian Zhang, Wenwu Zhu, Xiang-Gen Xia, Ya-Qin Zhang:
Optimal joint source-channel bit allocation for MPEG-4 fine granularity scalable video over OFDM system. 360-363 - Chung-Neng Wang, Chia-Yang Tsai, Hsiao-Chiang Chuang, Yao-Chung Lin, Jin-He Chen, Kin Lam Tong, Feng-Cheng Chang, Chun-Jen Tsai, Shuh-Ying Lee, Tihao Chiang, Hsueh-Ming Hang:
FGS-based video streaming test-bed for MPEG 21 universal multimedia access with digital item adaptation. 364-367 - Shuiming Ye, Xinggang Lin, Qibin Sun:
Content based error detection and concealment for image transmission over wireless channel. 368-371 - Kwang-deok Seo, Soon-kak Kwon, Sug Ky Hong, Jae-kyoon Kim:
Dynamic bit-rate reduction based on frame-skipping and requantization for MPEG-1 to MPEG-4 transcoder. 372-375 - S. Zahnd, Patrick Lichtsteiner, Tobi Delbrück:
Integrated vision sensor for detecting boundary crossings. 376-379 - Mukesh A. Zaveri, Shabbir N. Merchant, Uday B. Desai:
Multiple single pixel dim target detection in infrared image sequence. 380-383 - Datchakorn Tancharoen, Hatairat Kortrakulkij, S. Khemachai, Supavadee Aramvith, Somchai Jitapunkul:
Automatic face color segmentation based rate control for low bit-rate video coding. 384-387 - R. Thamvichai, Tamal Bose, Miloje S. Radenkovic:
Multiplierless predictor for DPCM of images. 388-391 - Ce Zhu, Xiao Lin, Lap-Pui Chau:
An enhanced hexagonal search algorithm for block motion estimation. 392-395 - Khumanthem Manglem Singh, Prabin Kumar Bora:
Adaptive vector median filter for removal impulses from color images. 396-399 - Masahiro Iwahashi, Osamu Nishida, Somchart Chokchaitam, Noriyoshi Kambayashi:
Optimum word length allocation for multipliers of integer DCT. 400-403 - K. C. Lo, Y. H. Chan, M. P. Yu:
A novel algorithm for color quantization by 3D diffusion. 404-407 - Noritaka Yamashita, Hiroo Sekiya, Jianming Lu, Takashi Yahagi:
New partition-based filters for suppressing mixed high probability impulse and Gaussian noises in images. 408-411 - Kai Fung Tsang, Oscar C. Au:
Fast control grid point estimation for mesh based motion estimation. 412-415 - Osamu Watanabe, Hitoshi Kiya:
ROI-based scalability for progressive transmission in JPEG2000 coding. 416-419 - Shinji Fukuma, Shigeru Ikuta, M. Ito, S. Nishimura, Masahiko Nawate:
An ROI image coding based on switching wavelet transform. 420-423 - Suksan Jirachawang, Vutipong Areekul:
Adaptive directional zerotree image coding. 424-427 - Momotaz Begum, Nurun Nahar, Kaneez Fatimah, Kamrul Hasan:
An efficient wavelet-VQ method for image coding. 428-431 - Khairul Munadi, Masayuki Kurosaki, Kiyoshi Nishikawa, Hitoshi Kiya:
Error protection for JPEG2000 encoded images and its evaluation over OFDM channel. 432-435 - Zhibin Pan, Koji Kotani, Tadahiro Ohmi:
A post-processing method for vector quantization to achieve higher PSNR and nearly constant bit rate. 436-439 - Oscar C. Au, Ming Sun Fu:
Spatial varying filtering for color filter array interpolation in digital still cameras. 440-443 - Songpol Ongwattanakul, Phaisit Chewputtanagul, David Jeff Jackson, Kenneth G. Ricks:
Scalable giga-pixels/s binary image morphological operations. 444-447 - Sherif M. Saif, Hazem M. Abbas, Salwa M. Nassar:
FPGA implementation of block truncation coding algorithm for gray scale images. 448-451 - Shibu Menon, Chip-Hong Chang, Rui Xiao:
FPGA implementation of a frequency adaptive learning SOFM for digital color still imaging. 452-455 - Feng Jing, Mingjing Li, HongJiang Zhang, Bo Zhang:
Unsupervised image segmentation using local homogeneity analysis. 456-459 - Yuan Been Chen, Oscal T.-C. Chen:
Multiple contour segmentation with automatic thresholding. 460-463 - Douglas Chai, Son Lam Phung, Abdesselam Bouzerdoum:
A Bayesian skin/non-skin color classifier using non-parametric density estimation. 464-467 - Suree Pumrin, Daniel J. Dailey:
Vehicle image classification via expectation-maximization algorithm. 468-471 - Humberto Ochoa, K. R. Rao:
A low bit-rate hybrid DWT-SVD image-coding system (HDWTSVD) for monochromatic images. 472-475 - Kousuke Imamura, Ahmed Swilem, Hideo Hashimoto:
Fast codeword search algorithm for ECVQ using hyperplane decision rule. 476-479