"Global elimination algorithm and architecture design for fast block ..."

Yu-Wen Huang et al. (2004)

> Home

Details and statistics

DOI: 10.1109/TCSVT.2004.828321

access: closed

type: Journal Article

metadata version: 2024-02-05

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tcsv/HuangCHC04
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcsv/HuangCHC04
Yu-Wen Huang, Shao-Yi Chien, Bing-Yu Hsieh, Liang-Gee Chen:
Global elimination algorithm and architecture design for fast block matching motion estimation. IEEE Trans. Circuits Syst. Video Technol. 14(6): 898-907 (2004)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.