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ORCIDKevin J. Chen
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- affiliation: Hong Kong University of Science and Technology, Department of Electronic and Computer Engineering, Hong Kong
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Journal Articles
- 2024
[j12]Jiahui Sun
, Zheyang Zheng, Li Zhang, Kevin J. Chen:
Characteristics and Evaluation Approaches of Human-Body-Model Electrostatic Discharge Across Schottky p-GaN Gate HEMTs. IEEE Trans. Ind. Electron. 71(3): 3113-3121 (2024)- 2022
- [j11]Han Xu, Gaofei Tang, Jin Wei, Zheyang Zheng, Kevin J. Chen:
Monolithic Integration of Gate Driver and Protection Modules With P-GaN Gate Power HEMTs. IEEE Trans. Ind. Electron. 69(7): 6784-6793 (2022) - [j10]Jiahui Sun, Kailun Zhong, Zheyang Zheng, Gang Lyu, Kevin J. Chen:
Short-Circuit Failure Mechanisms of 650-V GaN/SiC Cascode Devices in Comparison With SiC MOSFETs. IEEE Trans. Ind. Electron. 69(7): 7340-7348 (2022) - [j9]Kailun Zhong, Jin Wei, Jiabei He, Sirui Feng, Yuru Wang, Song Yang, Kevin J. Chen:
IG- and VGS-Dependent Dynamic RON Characterization of Commercial High-Voltage p-GaN Gate Power HEMTs. IEEE Trans. Ind. Electron. 69(8): 8387-8395 (2022) - [j8]Kailun Zhong, Yuru Wang, Gang Lyu, Jin Wei, Jiahui Sun, Kevin J. Chen:
650-V Normally-OFF GaN/SiC Cascode Device for Power Switching Applications. IEEE Trans. Ind. Electron. 69(9): 8997-9006 (2022) - [j7]Gang Lyu, Jiahui Sun, Yuru Wang, Kevin J. Chen:
Short-Circuit Characteristics and High-Current Induced Oscillations in a 1200-V/80-mΩ Normally-Off SiC/GaN Cascode Device. IEEE Trans. Ind. Electron. 69(12): 12773-12783 (2022) - 2021
- [j6]Jiahui Sun, Jin Wei, Zheyang Zheng, Kevin J. Chen:
Short Circuit Capability Characterization and Analysis of p-GaN Gate High-Electron-Mobility Transistors Under Single and Repetitive Tests. IEEE Trans. Ind. Electron. 68(9): 8798-8807 (2021) - 2020
- [j5]Yuru Wang, Gang Lyu, Jin Wei, Zheyang Zheng, Jiabei He, Jiacheng Lei, Kevin J. Chen:
Characterization of Static and Dynamic Behavior of 1200 V Normally off GaN/SiC Cascode Devices. IEEE Trans. Ind. Electron. 67(12): 10284-10294 (2020) - 2015
- [j4]Xuan Wang, Jiang Xu, Zhe Wang, Kevin J. Chen, Xiaowen Wu, Zhehui Wang, Peng Yang, Luan H. K. Duong:
An Analytical Study of Power Delivery Systems for Many-Core Processors Using On-Chip and Off-Chip Voltage Regulators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(9): 1401-1414 (2015) - 2006
- [j3]Yong Cai, Yugang Zhou, Kei May Lau, Kevin J. Chen:
Enhancement-Mode AlGaN/GaN HEMTs with Low On-Resistance and Low Knee-Voltage. IEICE Trans. Electron. 89-C(7): 1025-1030 (2006) - 2003
- [j2]Kevin J. Chen, Guofu Niu:
Logic synthesis and circuit modeling of a programmable logic gate based on controlled quenching of series-connected negative differential resistance devices. IEEE J. Solid State Circuits 38(2): 312-318 (2003) - 1998
- [j1]Takao Waho, Kevin J. Chen, Masafumi Yamamoto:
Resonant-tunneling diode and HEMT logic circuits with multiple thresholds and multilevel output. IEEE J. Solid State Circuits 33(2): 268-274 (1998)
Conference and Workshop Papers
- 2021
- [c7]Mengyuan Hua, Junting Chen, Chengcai Wang, Lingling Li, Ling Liu, Zheyang Zheng, Kevin J. Chen:
E-mode p-FET-bridge HEMT: Toward high VTH, low reverse-conduction loss and enhanced stability. ASICON 2021: 1-4 - 2019
- [c6]Mengyuan Hua, Song Yang, Jin Wei, Zheyang Zheng, Jiabei He, Kevin J. Chen:
Reverse-Bias Stability and Reliability of Enhancement-mode GaN-based MIS-FET. ASICON 2019: 1-4 - 2018
- [c5]Mengyuan Hua, Kevin J. Chen:
High-performance Enhancement-mode GaN Power MIS-FET with Interface Protection Layer. DSP 2018: 1-5 - 2014
- [c4]Xuan Wang, Jiang Xu, Zhe Wang, Kevin J. Chen, Xiaowen Wu, Zhehui Wang:
Characterizing power delivery systems with on/off-chip voltage regulators for many-core processors. DATE 2014: 1-4 - 2010
- [c3]Jianan Lv, Zhenchuan Yang, Guizhen Yan, Yong Cai, Baoshun Zhang, Kevin J. Chen:
Residual stress characterization of GaN microstructures using bent-beam strain sensors. NEMS 2010: 138-140 - 2003
- [c2]Xiao Huo, Guo-Wei Xiao, Kevin J. Chen, Philip C. H. Chan:
Silicon-on-organic integration of a 2.4GHz VCO using high Q copper inductors and solder-bumped flip chip technology. CICC 2003: 537-540 - 1996
- [c1]Takao Waho, Kevin J. Chen, Masafumi Yamamoto:
A Literal Gate Using Resonant-Tunneling Devices. ISMVL 1996: 68-73
Coauthor Index
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