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ORCIDEnrico Mezzetti
Person information
- affiliation: Barcelona Supercomputing Center, Spain
- affiliation (former): University of Padua, Italy
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Books and Theses
- 2012
[b1]Enrico Mezzetti:
Cache-aware development of high integrity real-time systems. University of Bologna, Italy, 2012
Journal Articles
- 2023
- [j11]Axel Brando
, Isabel Serra, Enrico Mezzetti, Francisco J. Cazorla, Jon Pérez-Cerrolaza, Jaume Abella:
On Neural Networks Redundancy and Diversity for Their Use in Safety-Critical Systems. Computer 56(5): 41-50 (2023) - [j10]Miguel Alcon, Axel Brando, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
Main sources of variability and non-determinism in AD software: taxonomy and prospects to handle them. Real Time Syst. 59(3): 438-478 (2023) - [j9]Roger Pujol, Josep Jorba, Hamid Tabani, Leonidas Kosmidis, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
Vector Extensions in COTS Processors to Increase Guaranteed Performance in Real-Time Systems. ACM Trans. Embed. Comput. Syst. 22(2): 21:1-21:26 (2023) - [j8]Jordi Cardona, Carles Hernández, Jaume Abella, Enrico Mezzetti, Francisco J. Cazorla:
Accurately Measuring Contention in Mesh NoCs in Time-Sensitive Embedded Systems. ACM Trans. Design Autom. Electr. Syst. 28(3): 43:1-43:34 (2023) - 2020
- [j7]Sergi Vilardell, Isabel Serra, Roberto Santalla, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
HRM: Merging Hardware Event Monitors for Improved Timing Analysis of Complex MPSoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(11): 3662-3673 (2020) - 2019
- [j6]Francisco J. Cazorla, Leonidas Kosmidis, Enrico Mezzetti, Carles Hernández, Jaume Abella, Tullio Vardanega:
Probabilistic Worst-Case Timing Analysis: Taxonomy and Comprehensive Survey. ACM Comput. Surv. 52(1): 14:1-14:35 (2019) - [j5]Suzana Milutinovic, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
Increasing the Reliability of Software Timing Analysis for Cache-Based Processors. IEEE Trans. Computers 68(6): 836-851 (2019) - 2018
- [j4]Francisco J. Cazorla, Jaume Abella, Enrico Mezzetti, Carles Hernández, Tullio Vardanega, Guillem Bernat:
Reconciling Time Predictability and Performance in Future Computing Systems. IEEE Des. Test 35(2): 48-56 (2018) - [j3]Enrico Mezzetti, Leonidas Kosmidis, Jaume Abella, Francisco J. Cazorla:
High-Integrity Performance Monitoring Units in Automotive Chips for Reliable Timing V&V. IEEE Micro 38(1): 56-65 (2018) - [j2]Irune Agirre, Francisco J. Cazorla, Jaume Abella, Carles Hernández, Enrico Mezzetti, Mikel Azkarate-askatsua, Tullio Vardanega:
Fitting Software Execution-Time Exceedance into a Residual Random Fault in ISO-26262. IEEE Trans. Reliab. 67(3): 1314-1327 (2018) - 2015
- [j1]Enrico Mezzetti, Marco Ziccardi, Tullio Vardanega, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla:
Randomized Caches Can Be Pretty Useful to Hard Real-Time Systems. Leibniz Trans. Embed. Syst. 2(1): 01:1-01:10 (2015)
Conference and Workshop Papers
- 2024
- [c51]Javier Barrera, Leonidas Kosmidis, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
Increasing Testing Robustness of GPU Software in Embedded Critical Systems. SAC 2024: 452-453 - 2023
- [c50]Axel Brando, Isabel Serra, Enrico Mezzetti, Francisco J. Cazorla, Jaume Abella:
Standardizing the Probabilistic Sources of Uncertainty for the sake of Safety Deep Learning. SafeAI@AAAI 2023 - [c49]Jaume Abella, Jon Pérez, Cristofer Englund, Bahram Zonooz, Gabriele Giordana, Carlo Donzella, Francisco J. Cazorla, Enrico Mezzetti, Isabel Serra, Axel Brando, Irune Agirre, Fernando Eizaguirre, Thanh Hai Bui, Elahe Arani, Fahad Sarfraz, Ajay Balasubramaniam, Ahmed Badar, Ilaria Bloise, Lorenzo Feruglio, Ilaria Cinelli, Davide Brighenti, Davide Cunial:
SAFEXPLAIN: Safe and Explainable Critical Embedded Systems Based on AI. DATE 2023: 1-6 - [c48]Sergio Garcia-Esteban, Alejandro Serrano-Cases, Jaume Abella, Enrico Mezzetti, Francisco J. Cazorla:
Quasi Isolation QoS Setups to Control MPSoC Contention in Integrated Software Architectures. ECRTS 2023: 5:1-5:25 - [c47]Asier Fernández de Lecea, Mohamed Hassan, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
Improving Timing-Related Guarantees for Main Memory in Multicore Critical Embedded Systems. RTSS 2023: 265-278 - [c46]Jeremy Jens Giesen León, Enrico Mezzetti, Jaume Abella, Francisco Javier Cazorla-Almeida:
ASCOM: Affordable Sequence-aware COntention Modeling in Crossbar-based MPSoCs. SAC 2023: 471-474 - 2022
- [c45]Axel Brando, Isabel Serra, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
Using Quantile Regression in Neural Networks for Contention Prediction in Multicore Processors. ECRTS 2022: 4:1-4:25 - [c44]Sergi Vilardell, Isabel Serra, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla, Joan del Castillo:
Using Markov's Inequality with Power-Of-k Function for Probabilistic WCET Estimation. ECRTS 2022: 20:1-20:24 - 2021
- [c43]Alejandro Serrano-Cases, Juan M. Reina, Jaume Abella, Enrico Mezzetti, Francisco J. Cazorla:
Leveraging Hardware QoS to Control Contention in the Xilinx Zynq UltraScale+ MPSoC. ECRTS 2021: 3:1-3:26 - [c42]Jeremy Giesen, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
PRL: Standardizing Performance Monitoring Library for High-Integrity Real-Time Systems. ICCD 2021: 344-348 - [c41]Sergi Vilardell, Isabel Serra, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
MUCH: exploiting pairwise hardware event monitor correlations for improved timing analysis of complex MPSoCs. SAC 2021: 511-520 - 2020
- [c40]Xavier Palomo, Mikel Fernández, Sylvain Girbal, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla, Laurent Rioux:
Tracing Hardware Monitors in the GR712RC Multicore Platform: Challenges and Lessons Learnt from a Space Case Study. ECRTS 2020: 15:1-15:25 - [c39]Jeremy Giesen, Pedro Benedicte, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
Modeling Contention Interference in Crossbar-based Systems via Sequence-Aware Pairing (SeAP). RTAS 2020: 253-266 - [c38]Miguel Alcon, Hamid Tabani, Leonidas Kosmidis, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
Timing of Autonomous Driving Software: Problem Analysis and Prospects for Future Solutions. RTAS 2020: 267-280 - [c37]Javier Barrera, Leonidas Kosmidis, Hamid Tabani, Enrico Mezzetti, Jaume Abella, Mikel Fernández, Guillem Bernat, Francisco J. Cazorla:
On the reliability of hardware event monitors in MPSoCs for critical domains. SAC 2020: 580-589 - 2019
- [c36]Pedro Benedicte, Jaume Abella, Carles Hernández, Enrico Mezzetti, Francisco J. Cazorla:
Towards limiting the impact of timing anomalies in complex real-time processors. ASP-DAC 2019: 27-32 - [c35]Enrico Mezzetti, Luca Barbina, Jaume Abella, Stefania Botta, Francisco J. Cazorla:
AURIX TC277 Multicore Contention Model Integration for Automotive Applications. DATE 2019: 1202-1203 - [c34]Roger Pujol, Hamid Tabani, Leonidas Kosmidis, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
Generating and Exploiting Deep Learning Variants to Increase Heterogeneous Resource Utilization in the NVIDIA Xavier. ECRTS 2019: 23:1-23:23 - [c33]Xavier Palomo, Enrico Mezzetti, Jaume Abella, Reinder J. Bril, Francisco J. Cazorla:
Accurate ILP-Based Contention Modeling on Statically Scheduled Multicore Systems. RTAS 2019: 15-28 - [c32]Jaume Abella, Enrico Mezzetti, Francisco J. Cazorla:
On assessing the viability of probabilistic scheduling with dependent tasks. SAC 2019: 625-634 - [c31]Jeremy Giesen, Enrico Mezzetti, Jaume Abella, Enrique Fernández, Francisco J. Cazorla:
ePAPI: Performance Application Programming Interface for Embedded Platforms. WCET 2019: 3:1-3:13 - 2018
- [c30]Enrique Díaz, Enrico Mezzetti, Leonidas Kosmidis, Jaume Abella, Francisco J. Cazorla:
Modelling multicore contention on the AURIXTM TC27x. DAC 2018: 97:1-97:6 - [c29]Suzana Milutinovic, Jaume Abella, Enrico Mezzetti, Francisco J. Cazorla:
Measurement-based cache representativeness on multipath programs. DAC 2018: 123:1-123:6 - [c28]Jordi Cardona, Carles Hernández, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
NoCo: ILP-Based Worst-Case Contention Estimation for Mesh Real-Time Manycores. RTSS 2018: 265-276 - 2017
- [c27]Enrique Díaz, Mikel Fernández, Leonidas Kosmidis, Enrico Mezzetti, Carles Hernández, Jaume Abella, Francisco J. Cazorla:
MC2: Multicore and Cache Analysis via Deterministic and Probabilistic Jitter Bounding. Ada-Europe 2017: 102-118 - [c26]Suzana Milutinovic, Jaume Abella, Irune Agirre, Mikel Azkarate-askasua, Enrico Mezzetti, Tullio Vardanega, Francisco J. Cazorla:
Software Time Reliability in the Presence of Cache Memories. Ada-Europe 2017: 233-249 - [c25]Enrico Mezzetti, Mikel Fernández, Alen Bardizbanyan, Irune Agirre, Jaume Abella, Tullio Vardanega, Francisco J. Cazorla:
EPC Enacted: Integration in an Industrial Toolbox and Use against a Railway Application. RTAS 2017: 163-174 - [c24]Enrico Mezzetti, Jaume Abella, Carles Hernández, Francisco J. Cazorla:
Work-in-Progress Paper: An Analysis of the Impact of Dependencies on Probabilistic Timing Analysis and Task Scheduling. RTSS 2017: 357-359 - [c23]Suzana Milutinovic, Enrico Mezzetti, Jaume Abella, Tullio Vardanega, Francisco J. Cazorla:
On uses of extreme value theory fit for industrial-quality WCET analysis. SIES 2017: 1-6 - 2016
- [c22]Francisco J. Cazorla, Jaume Abella, Jan Andersson, Tullio Vardanega, Francis Vatrinet, Iain Bate, Ian Broster, Mikel Azkarate-askasua, Franck Wartel, Liliana Cucu, Fabrice Cros, Glenn Farrall, Adriana Gogonel, Andrea Gianarro, Benoit Triquet, Carles Hernández, Code Lo, Cristian Maxim, David Morales, Eduardo Quiñones, Enrico Mezzetti, Leonidas Kosmidis, Irune Agirre, Mikel Fernández, Mladen Slijepcevic, Philippa Conmy, Walid Talaboulma:
PROXIMA: Improving Measurement-Based Timing Analysis through Randomisation and Probabilistic Analysis. DSD 2016: 276-285 - [c21]Enrique Díaz, Jaume Abella, Enrico Mezzetti, Irune Agirre, Mikel Azkarate-askasua, Tullio Vardanega, Francisco J. Cazorla:
Mitigating Software-Instrumentation Cache Effects in Measurement-Based Timing Analysis. WCET 2016: 1:1-1:11 - [c20]Leonidas Kosmidis, Davide Compagnin, David Morales, Enrico Mezzetti, Eduardo Quiñones, Jaume Abella, Tullio Vardanega, Francisco J. Cazorla:
Measurement-Based Timing Analysis of the AURIX Caches. WCET 2016: 9:1-9:11 - 2015
- [c19]Sebastiano Catellani, Luca Bonato, Sebastian Huber, Enrico Mezzetti:
Challenges in the Implementation of MrsP. Ada-Europe 2015: 179-195 - [c18]Franck Wartel, Leonidas Kosmidis, Adriana Gogonel, Andrea Baldovin, Zoë R. Stephenson, Benoit Triquet, Eduardo Quiñones, Code Lo, Enrico Mezzetti, Ian Broster, Jaume Abella, Liliana Cucu-Grosjean, Tullio Vardanega, Francisco J. Cazorla:
Timing analysis of an avionics case study on complex hardware/software platforms. DATE 2015: 397-402 - [c17]Davide Compagnin, Enrico Mezzetti, Tullio Vardanega:
Experimental Evaluation of Optimal Schedulers Based on Partitioned Proportionate Fairness. ECRTS 2015: 115-126 - [c16]Marco Ziccardi, Enrico Mezzetti, Tullio Vardanega, Jaume Abella, Francisco J. Cazorla:
EPC: Extended Path Coverage for Measurement-Based Probabilistic Timing Analysis. RTSS 2015: 338-349 - [c15]Jaume Abella, Carles Hernández, Eduardo Quiñones, Francisco J. Cazorla, Philippa Ryan Conmy, Mikel Azkarate-askasua, Jon Pérez, Enrico Mezzetti, Tullio Vardanega:
WCET analysis methods: Pitfalls and challenges on their trustworthiness. SIES 2015: 39-48 - [c14]Marco Ziccardi, Alessandro Cornaglia, Enrico Mezzetti, Tullio Vardanega:
Software-enforced Interconnect Arbitration for COTS Multicores. WCET 2015: 11-20 - 2014
- [c13]Davide Compagnin, Enrico Mezzetti, Tullio Vardanega:
Putting RUN into Practice: Implementation and Evaluation. ECRTS 2014: 75-84 - [c12]Luca Bonato, Enrico Mezzetti, Tullio Vardanega:
Supporting Global Resource Sharing in RUN-scheduled Multiprocessor Systems. RTNS 2014: 109 - 2013
- [c11]Andrea Baldovin, Enrico Mezzetti, Tullio Vardanega:
Towards a Time-Composable Operating System. Ada-Europe 2013: 143-160 - [c10]Andrea Baldovin, Enrico Mezzetti, Tullio Vardanega:
Limited preemptive scheduling of non-independent task sets. EMSOFT 2013: 18:1-18:10 - [c9]Enrico Mezzetti, Tullio Vardanega:
A rapid cache-aware procedure positioning optimization to favor incremental development. IEEE Real-Time and Embedded Technology and Applications Symposium 2013: 107-116 - [c8]Andrea Baldovin, Andrea Graziano, Enrico Mezzetti, Tullio Vardanega:
Kernel-level time composability for avionics applications. SAC 2013: 1552-1554 - [c7]Franck Wartel, Leonidas Kosmidis, Code Lo, Benoit Triquet, Eduardo Quiñones, Jaume Abella, Adriana Gogonel, Andrea Baldovin, Enrico Mezzetti, Liliana Cucu, Tullio Vardanega, Francisco J. Cazorla:
Measurement-based probabilistic timing analysis: Lessons from an integrated-modular avionics case study. SIES 2013: 241-248 - 2012
- [c6]Liliana Cucu-Grosjean, Luca Santinelli, Michael Houston, Code Lo, Tullio Vardanega, Leonidas Kosmidis, Jaume Abella, Enrico Mezzetti, Eduardo Quiñones, Francisco J. Cazorla:
Measurement-Based Probabilistic Timing Analysis for Multi-path Programs. ECRTS 2012: 91-101 - [c5]Andrea Baldovin, Enrico Mezzetti, Tullio Vardanega:
A Time-composable Operating System. WCET 2012: 69-80 - 2010
- [c4]Enrico Mezzetti, Adam Betts, José F. Ruiz, Tullio Vardanega:
Cache-Aware Development of High-Integrity Systems. Ada-Europe 2010: 139-152 - [c3]Enrico Mezzetti, Marco Panunzio, Tullio Vardanega:
Preservation of Timing Properties with the Ada Ravenscar Profile. Ada-Europe 2010: 153-166 - [c2]Enrico Mezzetti, Tullio Vardanega:
Towards a Cache-Aware Development of High Integrity Real-Time Systems. RTCSA 2010: 329-338 - [c1]Enrico Mezzetti, Marco Panunzio, Tullio Vardanega:
Bounding the Effects of Resource Access Protocols on Cache Behavior. WCET 2010: 11-22
Coauthor Index
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last updated on 2024-07-08 14:55 CEST by the dblp team
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