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2010 – 2019
- 2019
[j3]Kuan-Ting Lai
, Fu-Chiung Cheng, Seng-cho Timothy Chou, Yi-Chun Chang, Guo-Wei Wu, Jung-Cheng Tsai:
AnyCharge: An IoT-Based Wireless Charging Service for the Public. IEEE Internet Things J. 6(6): 10888-10901 (2019)- 2015
- [c16]Fu-Chiung Cheng, An-Hao Peng, Xiao-Li Lin, Shu-Chuan Huang:
Hybrid encoded QDI combinational circuits. NEWCAS 2015: 1-4 - 2014
- [c15]Fu-Chiung Cheng, Yuan-Feng Chen, Shu-Chuan Huang, Ching-Yang Huang:
Synthesis of QDI FSMs from Synchronous Specifications. ASYNC 2014: 61-68 - 2013
- [c14]Fu-Chiung Cheng, Chi Chen:
Can QDI Combinational Circuits be Implemented without C-elements? ASYNC 2013: 134-141 - 2010
- [c13]Yuan-Teng Chang, Wei-Che Chen, Hung-Yue Tsai, Wei-Min Cheng, Chang-Jiu Chen, Fu-Chiung Cheng:
A low-latency GALS interface implementation. APCCAS 2010: 1183-1186
2000 – 2009
- 2007
- [c12]Fu-Chiung Cheng, Shu-Ming Chang, Chi-Huam Shieh:
Detection and Generation of Self-Timed Pipelines from High Level Specifications. VLSI Design 2007: 413-418 - 2006
- [c11]Fu-Chiung Cheng, Hung-Chi Wu:
Design and Implementation of Software Objects in Hardware. ICCD 2006: 458-463 - [c10]Fu-Chiung Cheng, Tai-Chang Hung, Young-Jang Chiou:
Analysis, Design and Implementation of Exception Handling in WWW Services. SOSE 2006: 102-109 - 2005
- [c9]Li-Kai Chang, Fu-Chiung Cheng:
Automatic Synthesis of Composable Sequential Quantum Boolean Circuits. ICCD 2005: 289-296 - [c8]Fu-Chiung Cheng, Tai-Chang Hung, Young-Jang Chiou, Te-Chun Chang:
Design and implementation of Web service integration tool. SOSE 2005: 91-96 - 2001
- [c7]Fu-Chiung Cheng, Shuen-Long Ho:
Efficient Systematic Error-correcting Codes for Semi-Delay-Insensitive Data Transmission. ICCD 2001: 24-31 - 2000
- [j2]Fu-Chiung Cheng, Stephen H. Unger, Michael Theobald:
Self-Timed Carry-Lookahead Adders. IEEE Trans. Computers 49(7): 659-672 (2000) - [c6]Fu-Chiung Cheng, Chuin-Ren Wang:
Specification and Design of a Quasi-Delay-Insensitive Java Card. VLSI Design 2000: 356-361
1990 – 1999
- 1998
- [c5]Fu-Chiung Cheng:
Practical design and performance evaluation of completion detection circuits. ICCD 1998: 354-359 - 1997
- [j1]Steven M. Nowick, Niraj K. Jha, Fu-Chiung Cheng:
Synthesis of asynchronous circuits for stuck-at and robust path delay fault testability. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(12): 1514-1521 (1997) - [c4]Fu-Chiung Cheng:
Synthesizing Iterative Functions into Delay-Insensitive Tree Circuits. ICCD 1997: 301-306 - [c3]Fu-Chiung Cheng, Stephen H. Unger, Michael Theobald, Wen-Chung Cho:
Delay-Insensitive Carry-Lookahead Adders. VLSI Design 1997: 322-328 - 1995
- [c2]Steven M. Nowick, Niraj K. Jha, Fu-Chiung Cheng:
Synthesis of asynchronous circuits for stuck-at and robust path delay fault testability. VLSI Design 1995: 171-176 - 1990
- [c1]Fu-Chiung Cheng, Huei-Huang Chen, Jiin-Hwai Perng:
Parallel execution on production systems. SPDP 1990: 463-470
Coauthor Index
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