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ORCIDMartin Rozkovec
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2020 – today
- 2020
[j2]Ondrej Novák, Martin Rozkovec
, Jan Plíva:
Decompressors using nonlinear codes. Microprocess. Microsystems 76: 103076 (2020)
2010 – 2019
- 2019
- [c16]Ondrej Novák, Martin Rozkovec, Jan Plíva:
Combinational Decompressors with Nonlinear Codes. DSD 2019: 500-505 - 2017
- [j1]Ondrej Novák, Jiri Jenícek, Martin Rozkovec:
Sequential Test Decompressors with Fast Tester Bits Wide-Spreading. J. Circuits Syst. Comput. 26(8): 1740001:1-1740001:16 (2017) - 2016
- [c15]Ondrej Novák, Jiri Jenícek, Martin Rozkovec:
Sequential test decompressors with fast variable wide spreading. DDECS 2016: 132-137 - [c14]Ondrej Novák, Jiri Jenícek, Martin Rozkovec:
Test Decompressor Effectivity Improvement. DSD 2016: 661-664 - [c13]Martin Rozkovec, Jirí Bucek:
Polynomial Based NUC Implemented on FPGA. DSD 2016: 670-673 - 2015
- [c12]Ondrej Novák, Jiri Jenícek, Martin Rozkovec:
LFSR Reseeding Based Test Compression Respecting Different Controllability of Decompressor Outputs. DDECS 2015: 9-14 - [c11]Ondrej Novák, Jiri Jenícek, Martin Rozkovec:
Test compression for circuits with multiple scan chains. LATS 2015: 1-6 - 2014
- [c10]Ondrej Novák, Jiri Jenícek, Martin Rozkovec:
Test-data compression with low number of channels and short test time. DDECS 2014: 104-109 - [c9]Tomas Drahonovsky, Martin Rozkovec, Ondrej Novák:
A highly flexible reconfigurable system on a Xilinx FPGA. ReConFig 2014: 1-6 - 2013
- [c8]Tomas Drahonovsky, Martin Rozkovec, Ondrej Novák:
Relocation of reconfigurable modules on Xilinx FPGA. DDECS 2013: 175-180 - [c7]Martin Chloupek, Jiri Jenícek, Ondrej Novák, Martin Rozkovec:
Test pattern decompression in parallel scan chain architecture. DDECS 2013: 219-223 - 2012
- [c6]Martin Rozkovec, Jiri Jenícek, Ondrej Novák:
An evaluation of the application dependent FPGA test method. DDECS 2012: 22-25 - 2011
- [c5]Jiri Jenícek, Martin Rozkovec, Ondrej Novák:
Test vector overlapping based compression tool for narrow test access mechanism. DDECS 2011: 387-392 - 2010
- [c4]Martin Rozkovec, Jiri Jenícek, Ondrej Novák:
Application Dependent FPGA Testing Method. DSD 2010: 525-530 - [c3]Martin Rozkovec, Jiri Jenícek, Ondrej Novák:
Application dependent FPGA testing method using compressed deterministic test vectors. IOLTS 2010: 192-193
2000 – 2009
- 2009
- [c2]Martin Rozkovec, Ondrej Novák:
Structural test of programmed FPGA circuits. DDECS 2009: 136-139 - 2008
- [c1]Martin Rozkovec:
Implementation of Dynamically Reconfigurable Test Architecture for FPGA Circuits. DDECS 2008: 182-185
Coauthor Index
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