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Noriaki Maeda
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2020 – today
- 2024
- [j8]Tsubasa Tashiro, Noriaki Maeda, Takeru Abekura, Rami Mizuta, Yui Terao, Satoshi Arima, Satoshi Onoue, Yukio Urabe:
Adaptation of Postural Sway in a Standing Position during Tilted Video Viewing Using Virtual Reality: A Comparison between Younger and Older Adults. Sensors 24(9): 2718 (2024) - 2021
- [j7]Noriaki Maeda, Makoto Komiya, Yuichi Nishikawa, Masanori Morikawa, Shogo Tsutsumi, Tsubasa Tashiro, Kazuki Fukui, Hiroaki Kimura, Yukio Urabe:
Effect of Acute Static Stretching on the Activation Patterns Using High-Density Surface Electromyography of the Gastrocnemius Muscle during Ramp-Up Task. Sensors 21(14): 4841 (2021) - [j6]Yuichi Nishikawa, Kohei Watanabe, Ales Holobar, Tetsuya Takahashi, Noriaki Maeda, Hirofumi Maruyama, Shinobu Tanaka, Allison S. Hyngstrom:
Association between the Degree of Pre-Synaptic Dopaminergic Pathway Degeneration and Motor Unit Firing Behavior in Parkinson's Disease Patients. Sensors 21(19): 6615 (2021) - [j5]Kazuki Fukui, Noriaki Maeda, Makoto Komiya, Shogo Tsutsumi, Keita Harada, Sayo Kuroda, Masanori Morikawa, Yukio Urabe:
Walking Practice Combined with Virtual Reality Contributes to Early Acquisition of Symmetry Prosthetic Walking: An Experimental Study Using Simulated Prosthesis. Symmetry 13(12): 2282 (2021)
2010 – 2019
- 2014
- [c5]Mitsuhiko Igarashi, Toshifumi Uemura, Ryo Mori, Noriaki Maeda, Hiroshi Kishibe, Midori Nagayama, Masaaki Taniguchi, Kohei Wakahara, Toshiharu Saito, Masaki Fujigaya, Kazuki Fukuoka, Koji Nii, Takeshi Kataoka, Toshihiro Hattori:
10.2 A 28nm HPM heterogeneous multi-core mobile application processor with 2GHz cores and low-power 1GHz cores. ISSCC 2014: 178-179 - 2013
- [j4]Noriaki Maeda, Shigenobu Komatsu, Masao Morimoto, Koji Tanaka, Yasumasa Tsukamoto, Koji Nii, Yasuhisa Shimazaki:
A 0.41 µA Standby Leakage 32 kb Embedded SRAM with Low-Voltage Resume-Standby Utilizing All Digital Current Comparator in 28 nm HKMG CMOS. IEEE J. Solid State Circuits 48(4): 917-923 (2013) - [j3]Kazuki Fukuoka, Noriaki Maeda, Koji Nii, Masaki Fujigaya, Noriaki Sakamoto, Takao Koike, Takahiro Irita, Kohei Wakahara, Tsugio Matsuyama, Keiji Hasegawa, Toshiharu Saito, Akira Fukuda, Kaname Teranishi, Takeshi Kataoka, Toshihiro Hattori:
Power-Management Features of R-Mobile U2, an Integrated Application Processor and Baseband Processor. IEEE Micro 33(6): 26-36 (2013) - [c4]Masaki Fujigaya, Noriaki Sakamoto, Takao Koike, Takahiro Irita, Kohei Wakahara, Tsugio Matsuyama, Keiji Hasegawa, Toshiharu Saito, Akira Fukuda, Kaname Teranishi, Kazuki Fukuoka, Noriaki Maeda, Koji Nii, Takeshi Kataoka, Toshihiro Hattori:
A 28nm High-κ metal-gate single-chip communications processor with 1.5GHz dual-core application processor and LTE/HSPA+-capable baseband processor. ISSCC 2013: 156-157 - 2012
- [c3]Noriaki Maeda, Shigenobu Komatsu, Masao Morimoto, Yasuhisa Shimazaki:
A 0.41µA standby leakage 32Kb embedded SRAM with Low-Voltage resume-standby utilizing all digital current comparator in 28nm HKMG CMOS. VLSIC 2012: 58-59
2000 – 2009
- 2009
- [c2]Shigenobu Komatsu, Masanao Yamaoka, Masao Morimoto, Noriaki Maeda, Yasuhisa Shimazaki, Kenichi Osada:
A 40-nm low-power SRAM with multi-stage replica-bitline technique for reducing timing variation. CICC 2009: 701-704 - 2008
- [c1]Masanao Yamaoka, Noriaki Maeda, Yasuhisa Shimazaki, Kenichi Osada:
65nm Low-Power High-Density SRAM Operable at 1.0V under 3σ Systematic Variation Using Separate Vth Monitoring and Body Bias for NMOS and PMOS. ISSCC 2008: 384-385 - 2006
- [j2]Masanao Yamaoka, Noriaki Maeda, Yoshihiro Shinozaki, Yasuhisa Shimazaki, Koji Nii, Shigeru Shimada, Kazumasa Yanagisawa, Takayuki Kawahara:
90-nm process-variation adaptive embedded SRAM modules with power-line-floating write technique. IEEE J. Solid State Circuits 41(3): 705-711 (2006) - 2005
- [j1]Masanao Yamaoka, Yoshihiro Shinozaki, Noriaki Maeda, Yasuhisa Shimazaki, Kei Kato, Shigeru Shimada, Kazumasa Yanagisawa, Kenichi Osada:
A 300-MHz 25-μA/Mb-leakage on-chip SRAM module featuring process-variation immunity and low-leakage-active mode for mobile-phone application processor. IEEE J. Solid State Circuits 40(1): 186-194 (2005)
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