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ORCIDDonald S. Gardner
Person information
- affiliation: Intel Corporation, Santa Clara, CA, USA
- affiliation: Hitachi Research Laboratories, Japan
- affiliation (PhD 1988): Stanford University, CA, USA
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2010 – 2019
- 2014
[j4]David Lin, Ted Hong, Yanjing Li, Eswaran S, Sharad Kumar, Farzan Fallah, Nagib Hakim, Donald S. Gardner
, Subhasish Mitra:
Effective Post-Silicon Validation of System-on-Chips Using Quick Error Detection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(10): 1573-1590 (2014)- 2013
- [c10]David Lin, Ted Hong, Yanjing Li, Farzan Fallah, Donald S. Gardner, Nagib Hakim, Subhasish Mitra:
Overcoming post-silicon validation challenges through quick error detection (QED). DATE 2013: 320-325 - 2012
- [c9]Subhasish Mitra, David Lin, Nagib Hakim, Donald S. Gardner:
Bug localization techniques for effective post-silicon validation. ASP-DAC 2012: 291 - 2011
- [c8]Donald S. Gardner, Gerhard Schrom, Fabrice Paillet, Tanay Karnik, Shekhar Borkar:
Integrated inductors with magnetic materials for on-chip power conversion. Hot Chips Symposium 2011: 1-36 - 2010
- [c7]Nicholas P. Carter, Helia Naeimi, Donald S. Gardner:
Design techniques for cross-layer resilience. DATE 2010: 1023-1028 - [c6]Ted Hong, Yanjing Li, Sung-Boem Park, Diana Mui, David Lin, Ziyad Abdel Kaleq, Nagib Hakim, Helia Naeimi, Donald S. Gardner, Subhasish Mitra:
QED: Quick Error Detection tests for effective post-silicon validation. ITC 2010: 154-163 - [c5]Yanjing Li, Onur Mutlu, Donald S. Gardner, Subhasish Mitra:
Concurrent autonomous self-test for uncore components in system-on-chips. VTS 2010: 232-237
2000 – 2009
- 2009
- [j3]Yanjing Li, Young Moon Kim, Evelyn Mintarno, Donald S. Gardner, Subhasish Mitra:
Overcoming Early-Life Failure and Aging for Robust Systems. IEEE Des. Test Comput. 26(6): 28-39 (2009) - 2007
- [j2]Peter Hazucha, Sung Tae Moon, Gerhard Schrom, Fabrice Paillet, Donald S. Gardner, Saravanan Rajapandian, Tanay Karnik:
High Voltage Tolerant Linear Regulator With Fast Digital Control for Biasing of Integrated DC-DC Converters. IEEE J. Solid State Circuits 42(1): 66-73 (2007) - [c4]Peter Hazucha, Fabrice Paillet, Sung Tae Moon, David J. Rennie, Gerhard Schrom, Donald S. Gardner, Kenneth Ikeda, Gell Gellman, Tanay Karnik:
Low Voltage Buffered Bandgap Reference. ISQED 2007: 93-97 - 2006
- [c3]Tanay Karnik, Peter Hazucha, Gerhard Schrom, Fabrice Paillet, Donald S. Gardner:
High-frequency DC-DC conversion : fact or fiction. ISCAS 2006 - [c2]Peter Hazucha, Sung Tae Moon, Gerhard Schrom, Fabrice Paillet, Donald S. Gardner, Saravanan Rajapandian, Tanay Karnik:
A Linear Regulator with Fast Digital Control for Biasing Integrated DC-DC Converters. ISSCC 2006: 2180-2189 - 2005
- [j1]Peter Hazucha, Gerhard Schrom, Jaehong Hahn, Bradley A. Bloechel, Paul Hack, Gregory E. Dermer, Siva G. Narendra, Donald S. Gardner, Tanay Karnik, Vivek De, Shekhar Borkar:
A 233-MHz 80%-87% efficient four-phase DC-DC converter utilizing air-core inductors on package. IEEE J. Solid State Circuits 40(4): 838-845 (2005) - 2004
- [c1]Gerhard Schrom, Peter Hazucha, Jae-Hong Hahn, Volkan Kursun, Donald S. Gardner, Siva G. Narendra, Tanay Karnik, Vivek De:
Feasibility of monolithic and 3D-stacked DC-DC converters for microprocessors in 90nm technology generation. ISLPED 2004: 263-268
Coauthor Index
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