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Appa Iyer Sivakumar
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2010 – 2019
- 2018
- [j9]Thu Ba T. Nguyen, Appa Iyer Sivakumar, Stephen C. Graves:
Capacity planning with demand uncertainty for outpatient clinics. Eur. J. Oper. Res. 267(1): 338-348 (2018) - 2014
- [j8]Kunpeng Li, Bin Chen, Appa Iyer Sivakumar, Yong Wu:
An inventory-routing problem with the objective of travel time minimization. Eur. J. Oper. Res. 236(3): 936-945 (2014) - 2013
- [c20]Xianfei Jin, Appa Iyer Sivakumar, Sing Yong Lim:
A simulation based analysis on reducing patient waiting time for consultation in an outpatient eye clinic. WSC 2013: 2192-2203 - 2011
- [j7]John Benedict C. Tajan, Appa Iyer Sivakumar, Stanley B. Gershwin:
Controlling job arrivals with processing time windows into Batch Processor Buffer. Ann. Oper. Res. 191(1): 193-218 (2011) - [j6]Amit Kumar Gupta, Appa Iyer Sivakumar, Peter Lendermann:
Cycle time simulation study for cluster tool operation in IC fabrication. Int. J. Manuf. Technol. Manag. 23(3/4): 179-192 (2011)
2000 – 2009
- 2009
- [j5]Adeline T. H. Ang, Appa Iyer Sivakumar, Chao Qi:
Criteria selection and analysis for single machine dynamic on-line scheduling with multiple objectives and sequence-dependent setups. Comput. Ind. Eng. 56(4): 1223-1231 (2009) - 2008
- [j4]Kunpeng Li, Appa Iyer Sivakumar, Viswanath Kumar Ganesan:
Complexities and algorithms for synchronized scheduling of parallel machine assembly and air transportation in consumer electronics supply chain. Eur. J. Oper. Res. 187(2): 442-455 (2008) - [c19]Appa Iyer Sivakumar, Chao Qi, Andy Darwin Kasan Hidayat:
Experimental study on variations of WIPLOAD Control in semiconductor wafer fabrication environment. WSC 2008: 2035-2040 - [c18]John Benedict C. Tajan, Appa Iyer Sivakumar, Stanley B. Gershwin:
Online control of a batch processor with incompatible job families under correlated future arrivals. WSC 2008: 2100-2108 - [c17]Amit Kumar Gupta, Peter Lendermann, Appa Iyer Sivakumar, John Priyadi:
Simulation analysis of cluster tool operations in wafer fabrication. WSC 2008: 2141-2147 - 2007
- [c16]Chao Qi, Appa Iyer Sivakumar, Stanley B. Gershwin:
Simulation experimental investigation on job release control in semiconductor wafer fabrication. WSC 2007: 1737-1746 - [c15]Adeline T. H. Ang, Appa Iyer Sivakumar:
Online multiobjective single machine dynamic scheduling with sequence-dependent setups using simulation-based genetic algorithm with desirability function. WSC 2007: 1828-1834 - 2006
- [j3]Kunpeng Li, Viswanath Kumar Ganesan, Appa Iyer Sivakumar:
Scheduling of single stage assembly with air transportation in a consumer electronic supply chain. Comput. Ind. Eng. 51(2): 264-278 (2006) - [j2]Viswanath Kumar Ganesan, Appa Iyer Sivakumar, G. Srinivasan:
Hierarchical minimization of completion time variance and makespan in jobshops. Comput. Oper. Res. 33: 1345-1367 (2006) - [c14]Amit Kumar Gupta, Appa Iyer Sivakumar:
Pareto control in multi-objective dynamic scheduling of a stepper machine in semiconductor wafer fabrication. WSC 2006: 1749-1756 - [c13]Chin Soon Chong, Appa Iyer Sivakumar, Malcolm Yoke Hean Low, Kheng Leng Gay:
A bee colony optimization algorithm to job shop scheduling. WSC 2006: 1954-1961 - 2005
- [c12]Chin Soon Chong, Malcolm Y. H. Low, Appa Iyer Sivakumar, Kheng Leng Gay:
Using simulation based approach to improve on the mean cycle time performance of dispatching rules. WSC 2005: 2194-2202 - 2004
- [c11]Viswanath Kumar Ganesan, Amit Kumar Gupta, Appa Iyer Sivakumar:
Bi-objective schedule control of batch processes in semiconductor manufacturing. RAM 2004: 1077-1082 - [c10]Amit Kumar Gupta, Appa Iyer Sivakumar, Viswanath Kumar Ganesan:
Look ahead batching to minimize earliness/tardiness measures in batch processes. RAM 2004: 1101-1106 - 2003
- [c9]Chin Soon Chong, Appa Iyer Sivakumar, Robert K. L. Gay:
Factory scheduling: simulation based scheduling using a two-pass approach. WSC 2003: 1433-1439 - [c8]Chin Soon Chong, Appa Iyer Sivakumar, Robert K. L. Gay:
Dynamic scheduling I: simulation-based scheduling for dynamic discrete manufacturing. WSC 2003: 1465-1473 - 2002
- [c7]Chao Qi, Tuck Keat Tang, Appa Iyer Sivakumar:
Modeling methodology: simulation based cause and effect analysis of cycle time and WIP in semiconductor wafer fabrication. WSC 2002: 1423-1430 - [c6]Chin Soon Chong, Appa Iyer Sivakumar, Robert K. L. Gay:
Semiconductor manufacturing: design, development and application of an object oriented simulation toolkit for real-time semiconductor manufacturing scheduling. WSC 2002: 1849-1856 - [c5]Amit K. Gupta II, Appa Iyer Sivakumar:
Semiconductor manufacturing: simulation based multiobjective schedule optimization in semiconductor manufacturing. WSC 2002: 1862-1870 - [c4]Amit K. Gupta II, Appa Iyer Sivakumar, Sumit Sarawgi:
Scheduling & control: shop floor scheduling with simulation based proactive decision support. WSC 2002: 1897-1902 - 2001
- [j1]Appa Iyer Sivakumar, Chin Soon Chong:
A simulation based analysis of cycle time distribution, and throughput in semiconductor backend manufacturing. Comput. Ind. 45(1): 59-78 (2001) - 2000
- [c3]Appa Iyer Sivakumar, Chin Soon Chong:
Development of an Object Oriented Simulation Engine for On-Line Simulation and Optimization. Annual Simulation Symposium 2000: 291-298 - [c2]Appa Iyer Sivakumar:
Simulation based cause and effect analysis of cycle time distribution in semiconductor backend. WSC 2000: 1464-1471
1990 – 1999
- 1999
- [c1]Appa Iyer Sivakumar:
Optimization of a cycle time and utilization in semiconductor test manufacturing using simulation based, on-line, near-real-time scheduling system. WSC 1999: 727-735
Coauthor Index
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