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Bernd Klauer
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Books and Theses
- 1995
- [b1]Bernd Klauer:
Assoziative Methoden zur Mustererkennung. Goethe University Frankfurt, Frankfurt am Main, Germany, 1995, pp. 1-171
Journal Articles
- 2016
- [j5]Marcel Eckert
, Dominik Meyer, Jan Haase
, Bernd Klauer:
Operating System Concepts for Reconfigurable Computing: Review and Survey. Int. J. Reconfigurable Comput. 2016: 2478907:1-2478907:11 (2016) - 2011
- [j4]Dominik Meyer, Bernd Klauer:
Multicore reconfiguration platform an alternative to RAMPSoC. SIGARCH Comput. Archit. News 39(4): 102-103 (2011) - 2002
- [j3]Frank Eschmann, Bernd Klauer, Ronald Charles Moore, Klaus Waldschmidt:
SDAARC: An Extended Cache-Only Memory Architecture. IEEE Micro 22(3): 62-70 (2002) - 1995
- [j2]Bernd Klauer, Andreas Bleck, Klaus Waldschmidt:
The AM3 associative processor. IEEE Micro 15(2): 70-78 (1995) - 1993
- [j1]Bernd Klauer, Klaus Waldschmidt:
Pen-based recognizing of handprinted characters. Microprocess. Microprogramming 38(1-5): 803-809 (1993)
Conference and Workshop Papers
- 2022
- [c39]Marcel Eckert, Alexander Klemd, Bernd Klauer, Johannes Timmermann, Delf Sachau:
Transfering Run-Time-Data Between Distinct FPGA Designs - Solutions in the Context of an ANC-Application. IECON 2022: 1-8 - 2021
- [c38]Alexander Klemd, Bernd Klauer, Johannes Timmermann, Delf Sachau:
A Flexible Multi-Channel Feedback FxLMS Architecture for FPGA Platforms. FPL 2021: 319-326 - [c37]Alexander Klemd, Patrick Nowak, Piero Rivera Benois, Etienne Gerat, Udo Zölzer, Bernd Klauer:
Exponential sine sweep measurement implementation targeting FPGA platforms. FPT 2021: 1-6 - [c36]Dominik Meyer, Jan Haase
, Marcel Eckert, Bernd Klauer:
A Modern Approach to Application Specific Processors for Improving the Security of Embedded Devices. IECON 2021: 1-6 - 2020
- [c35]Marcel Eckert, Jan Haase
, Bernd Klauer:
Unifying Timer and Interrupt Management for an ARM-RISC-V-Heterogeneous Multi-Core. IECON 2020: 2302-2309 - 2019
- [c34]Alexander Klemd, Marcel Eckert, Bernd Klauer, Jonas Hanselka, Delf Sachau:
A Parameterizable Feedback FxLMS Architecture for FPGA Platforms. HEART 2019: 17:1-17:4 - [c33]Dominik Meyer, Marcel Eckert, Bernd Klauer, Jan Haase
:
HDL FSM Code Generation Using a MIPS-based Assembler. ISIE 2019: 1351-1356 - [c32]Marcel Eckert, Dominik Meyer, Bernd Klauer:
Context Save and Restore of Partial Reconfiguration Regions for Xilinx FPGAs. ReCoSoC 2019: 5-12 - 2018
- [c31]Piero Rivera Benois, Patrick Nowak, Udo Zölzer, Marcel Eckert, Bernd Klauer:
Low-Latency FIR Filter Structures Targeting FPGA Platforms. HEART 2018: 14:1-14:7 - 2017
- [c30]Bernd Klauer, Jan Haase
, Dominik Meyer, Marcel Eckert:
Wireless sensor/actuator device configuration by NFC with secure key exchange. AFRICON 2017: 473-478 - [c29]Dominik Meyer, Jan Haase
, Marcel Eckert, Bernd Klauer:
New attack vectors for building automation and IoT. IECON 2017: 8126-8131 - 2016
- [c28]Jan Haase
, Dominik Meyer, Marcel Eckert, Bernd Klauer:
Wireless sensor/actuator device configuration by NFC. ICIT 2016: 1336-1340 - [c27]Dominik Meyer, Jan Haase
, Marcel Eckert, Bernd Klauer:
CloudSynth - Outsourcing hardware synthesis into the cloud. IECON 2016: 6199-6204 - [c26]Dominik Meyer, Jan Haase
, Marcel Eckert, Bernd Klauer:
A threat-model for building and home automation. INDIN 2016: 860-866 - 2015
- [c25]Dominik Meyer, Jan Haase
, Marcel Eckert, Bernd Klauer:
Clock speed optimization of runtime reconfigurable systems by signal latency measurement. IECON 2015: 550-555 - 2013
- [c24]Marcel Eckert, Igor Podebrad, Bernd Klauer:
Hardware Based Security Enhanced Direct Memory Access. Communications and Multimedia Security 2013: 145-151 - 2010
- [c23]Klaus Hildebrandt, Igor Podebrad, Bernd Klauer:
A Computer Architecture with Hardwarebased Malware Detection. ARES 2010: 41-45 - [c22]Bernd Klauer:
Konrad-Zuse-Workshop. Rechnender Raum und Zellulare Automaten (Vorwort). GI Jahrestagung (2) 2010: 123 - 2009
- [c21]Igor Podebrad, Klaus Hildebrandt, Bernd Klauer:
List of Criteria for a Secure Computer Architecture. SECURWARE 2009: 76-80 - 2006
- [c20]Dietmar Wippig, Bernd Klauer, Hans Christoph Zeidler:
Unsupervised Segmentation of Naval Infrared Images through a Markov Random Field Model. IPCV 2006: 474-480 - 2005
- [c19]Dietmar Wippig, Bernd Klauer, Hans Christoph Zeidler:
Extraction of Ship Silhouettes Using Active Contours from Infrared Images. VISION 2005: 172-177 - 2004
- [c18]Jan Haase
, Frank Eschmann, Bernd Klauer, Klaus Waldschmidt:
The SDVM: A Self Distributing Virtual Machine for Computer Clusters. ARCS 2004: 9-19 - 2002
- [c17]Bernd Klauer, Frank Eschmann, Ronald Charles Moore, Klaus Waldschmidt:
The CDAG: A Data Structure for Automatic Parallelization for a Multithreaded Architecture. PDP 2002: 219-226 - 2001
- [c16]Ronald Charles Moore, Bernd Klauer, Klaus Waldschmidt:
The SDAARC Architecture. PDP 2001: 429-435 - 2000
- [c15]Ronald Charles Moore, Bernd Klauer, Klaus Waldschmidt:
Tailoring a self-distributing architecture to a cluster computer environment. PDP 2000: 150-157 - 1999
- [c14]Bernd Klauer, Klaus Waldschmidt:
Prozessorarchitekturen für J2K. ARCS Workshops 1999: 3 - [c13]Ronald Charles Moore, Melanie Klang, Bernd Klauer, Klaus Waldschmidt:
Hybrides Scheduling. ARCS Workshops 1999: 211-218 - 1998
- [c12]Ronald Charles Moore, Bernd Klauer, Klaus Waldschmidt:
Automatic Scheduling for Cache Only Memory Architectures. HICSS (7) 1998: 597-598 - [c11]Ronald Charles Moore, Melanie Klang, Bernd Klauer, Klaus Waldschmidt:
Combining Static Partitioning with Dynamic Distribution of Threads. DIPES 1998: 85-96 - 1997
- [c10]Ronald Charles Moore, Bernd Klauer, Klaus Waldschmidt:
Compiler Technology for Two Novel Computer Architectures. ARCS 1997: 33-42 - [c9]Ronald Charles Moore, Bernd Klauer, Klaus Waldschmidt:
A Combined Virtual Shared Memory and Network which Schedules. Euro-PDS 1997: 42-47 - [c8]Ronald Charles Moore, Bernd Klauer, Klaus Waldschmidt:
What computer architecture can learn from computational intelligence-and vice versa. EUROMICRO 1997: 690-697 - 1996
- [c7]Aziz Can Yuceturk, Bernd Klauer, Stefan Zickenheiner, Ronald Charles Moore, Klaus Waldschmidt:
Mapping of Neural Networks onto Data Flow Graphs. EUROMICRO 1996: 51- - [c6]Ronald Charles Moore, Stefan Zickenheiner, Bernd Klauer, Frank Henritzi, Andreas Bleck, Klaus Waldschmidt:
Neural Compiler Technology for a Parallel Architecture. PDPTA 1996: 226-229 - [c5]Frank Henritzi, Andreas Bleck, Ronald Charles Moore, Bernd Klauer, Klaus Waldschmidt:
ADARC: A New Multi-Instruction Issue Approach. PDPTA 1996: 600-609 - 1995
- [c4]Justin Strohschneider, Bernd Klauer, Klaus Waldschmidt:
An associative communication network for fine and large grain dataflow. PDP 1995: 324-331 - 1993
- [c3]Bernd Klauer, Klaus Waldschmidt:
An Object-Oriented Pen-Based Recognizer for Handprinted Characters. CAIP 1993: 586-593 - [c2]Bernd Klauer:
The MHD Memory. DAGM-Symposium 1993: 568-575 - 1991
- [c1]Bernd Klauer, Klaus Waldschmidt:
Möglichkeiten zur Parallelisierung des Error-Backpropagation Algorithmus. Physik und Informatik 1991: 135-142
Coauthor Index
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