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Pratik Shrestha
This is just a disambiguation page, and is not intended to be the bibliography of an actual person. The links to all actual bibliographies of persons of the same or a similar name can be found below. Any publication listed on this page has not been assigned to an actual author yet. If you know the true author of one of the publications listed below, you are welcome to contact us.
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Other persons with the same name
- Pratik Shrestha 0001 — Tribhuvan University, Institute of Engineering, Lalitpur, Nepal
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2020 – today
- 2026
[i3]Aavash Chhetri, Bibek Niroula, Pratik Shrestha, Yash Raj Shrestha, Lesley A Anderson, Prashnna K. Gyawali, Loris Bazzani, Binod Bhattarai:
Med-MMFL: A Multimodal Federated Learning Benchmark in Healthcare. CoRR abs/2602.04416 (2026)- 2025
[c9]Pratik Shrestha, Ioannis Savidis:
Representation Learning for Digital Integrated Circuit Design Automation. ICCD 2025: 867-871
[c8]Zhengfeng Wu, Pratik Shrestha, Saran Phatharodom, Ioannis Savidis:
Differentiable Graph Neural Networks for Wirelength Estimation. ISCAS 2025: 1-5
[i2]Pratik Shrestha, Saran Phatharodom, Alec Aversa, David Blankenship, Zhengfeng Wu, Ioannis Savidis:
Deep Representation Learning for Electronic Design Automation. CoRR abs/2505.02105 (2025)
[i1]Zhengfeng Wu, Ziyi Chen, Nnaemeka Achebe, Vaibhav Venugopal Rao, Pratik Shrestha, Ioannis Savidis:
Emerging ML-AI Techniques for Analog and RF EDA. CoRR abs/2506.00007 (2025)- 2024
[c7]Pratik Shrestha
, Alec Aversa
, Saran Phatharodom
, Ioannis Savidis
:
EDA-schema: A Graph Datamodel Schema and Open Dataset for Digital Design Automation. ACM Great Lakes Symposium on VLSI 2024: 69-77
[c6]Pratik Shrestha, Ioannis Savidis:
EDA-ML: Graph Representation Learning Framework for Digital IC Design Automation. ISQED 2024: 1-7- 2023
[c5]Dinh Dang Khoa Le, Gibson Hu, Dikai Liu, Richardo Khonasty, Liang Zhao
, Shoudong Huang
, Pratik Shrestha, Ralph Belperio:
The QUENDA-BOT: Autonomous Robot for Screw-Fixing Installation in Timber Building Construction. CASE 2023: 1-6
[c4]Pratik Shrestha, Ioannis Savidis:
Graph Representation Learning for Parasitic Impedance Prediction of the Interconnect. ISCAS 2023: 1-5- 2022
[c3]Pratik Shrestha, Ioannis Savidis:
Synthesis of Coupling Capacitance Based Hidden State Transitions for Sequential Logic Locking. ISCAS 2022: 1734-1738
[c2]Pratik Shrestha, Saran Phatharodom, Ioannis Savidis:
Graph Representation Learning for Gate Arrival Time Prediction. MLCAD 2022: 127-133- 2020
[c1]Pratik Shrestha, Binayak Subedi, Megan Girard, Chirag Parikh, Nabeeh Kandalaft:
Wireless Communication Between FPGA and Microcontroller. CCWC 2020: 402-405
Coauthor Index

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last updated on 2026-03-21 01:18 CET by the dblp team
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