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Jing-Ping Xu
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2010 – 2019
- 2016
- [j14]Han-Han Lu, Jing-Ping Xu, Lu Liu, Li-Sheng Wang, Pui To Lai, Wing Man Tang:
Improved interfacial quality of GaAs metal-oxide-semiconductor device with NH3-plasma treated yittrium-oxynitride as interfacial passivation layer. Microelectron. Reliab. 56: 17-21 (2016) - [j13]Feng Ji, Jing-Ping Xu, Lu Liu, Wing Man Tang, Pui To Lai:
A 2-D analytical threshold-voltage model for GeOI/GeON MOSFET with high-k gate dielectric. Microelectron. Reliab. 57: 24-33 (2016) - 2015
- [j12]Y. Huang, Jing-Ping Xu, L. S. Wang, S. Y. Zhu:
A physical model on electron mobility in InGaAs nMOSFETs with stacked gate dielectric. Microelectron. Reliab. 55(2): 342-346 (2015) - 2014
- [j11]J. X. Chen, Jing-Ping Xu, Lu Liu, X. D. Huang, Pui To Lai:
Improved performance by using TaON/SiO2 as dual tunnel layer in Charge-Trapping nonvolatile memory. Microelectron. Reliab. 54(2): 393-396 (2014) - 2010
- [j10]Jing-Ping Xu, X. Xiao, Pui-To Lai:
A carrier-mobility model for high-k gate-dielectric Ge MOSFETs with metal gate electrode. Microelectron. Reliab. 50(8): 1081-1086 (2010)
2000 – 2009
- 2009
- [j9]Lu Liu, Jing-Ping Xu, L. L. Chen, Pui To Lai:
A study on the improved programming characteristics of flash memory with Si3N4/SiO2 stacked tunneling dielectric. Microelectron. Reliab. 49(8): 912-915 (2009) - 2008
- [j8]Jing-Ping Xu, Y. P. Li, Pui-To Lai, W. B. Chen, S. G. Xu, J. G. Guan:
A 2D threshold-voltage model for small MOSFET with quantum-mechanical effects. Microelectron. Reliab. 48(1): 23-28 (2008) - [j7]Jing-Ping Xu, F. Ji, Pui-To Lai, J. G. Guan:
Influence of sidewall spacer on threshold voltage of MOSFET with high-k gate dielectric. Microelectron. Reliab. 48(2): 181-186 (2008) - [j6]C. X. Li, X. Zou, Pui-To Lai, Jing-Ping Xu, C. L. Chan:
Effects of Ti content and wet-N2 anneal on Ge MOS capacitors with HfTiO gate dielectric. Microelectron. Reliab. 48(4): 526-530 (2008) - [j5]F. Ji, Jing-Ping Xu, Pui-To Lai, J. G. Guan:
A fringing-capacitance model for deep-submicron MOSFET with high-k gate dielectric. Microelectron. Reliab. 48(5): 693-697 (2008) - 2007
- [j4]X. Zou, Jing-Ping Xu, C. X. Li, Pui-To Lai, W. B. Chen:
A threshold-voltage model of SiGe-channel pMOSFET without Si cap layer. Microelectron. Reliab. 47(2-3): 391-394 (2007) - [j3]W. B. Chen, Jing-Ping Xu, Pui-To Lai, Y. P. Li, S. G. Xu:
Gate leakage properties of MOS devices with tri-layer high-k gate dielectric. Microelectron. Reliab. 47(6): 937-943 (2007) - 2004
- [j2]Pui-To Lai, Jing-Ping Xu, H. P. Wu, C. L. Chan:
Interfacial properties and reliability of SiO2 grown on 6H-SiC in dry O2 plus trichloroethylene. Microelectron. Reliab. 44(4): 577-580 (2004) - 2003
- [j1]David C. T. Or, Pui-To Lai, Johnny K. O. Sin, Paul C. K. Kwok, Jing-Ping Xu:
Enhanced reliability for low-temperature gate dielectric of MOS devices by N2O or NO plasma nitridation. Microelectron. Reliab. 43(1): 163-166 (2003)
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