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ORCIDMengwei Si
Person information
- affiliation: Shanghai Jiao Tong University, Shanghai, China
- affiliation (former): Purdue University, West Lafayette, USA
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Books and Theses
- 2018
[b1]Mengwei Si:
III-V and 2D Devices: from MOSFETs to Steep-Slope Transistors. Purdue University, USA, 2018
Conference and Workshop Papers
- 2024
- [c13]Min Zhou, Hong Zhou, Mengwei Si, Guangjie Gao, Xiaojin Chen, Xiaoxiao Zhu, Kui Dang, Peijun Ma, Xiaohua Ma, Xuefeng Zheng, Zhihong Liu, Jincheng Zhang, Yuhao Zhang, Yue Hao:
71 GHz-fmax β-Ga2O3-on-SiC RF Power MOSFETs with Record Pout=3.1 W/mm and PAE=50.8% at 2 GHz, Pout= 2.3 W/mm at 4 GHz, and Low Microwave Noise Figure. VLSI Technology and Circuits 2024: 1-2 - 2023
- [c12]Zhuocheng Zhang, Zehao Lin, Chang Niu, Mengwei Si, Muhammad Ashraful Alam, Peide D. Ye:
Ultrahigh Bias Stability of ALD In2O3 FETs Enabled by High Temperature O2 Annealing. VLSI Technology and Circuits 2023: 1-2 - 2022
- [c11]Zehao Lin, Mengwei Si, Peide D. Ye:
Ultra-Fast Operation of BEOL-Compatible Atomic-Layer-Deposited In2O3 Fe-FETs: Achieving Memory Performance Enhancement with Memory Window of 2.5 V and High Endurance > 109 Cycles without VT Drift Penalty. VLSI Technology and Circuits 2022: 1-2 - [c10]Pai-Ying Liao, Sami Alajlouni, Mengwei Si, Zhuocheng Zhang, Zehao Lin, Jinhyun Noh, Calista Wilk, Ali Shakouri, Peide D. Ye:
Thermal Studies of BEOL-compatible Top-Gated Atomically Thin ALD In2O3 FETs. VLSI Technology and Circuits 2022: 322-323 - [c9]Xiao Lyu, Pragya R. Shrestha, Mengwei Si, Panni Wang, Junkang Li, Kin P. Cheung, Shimeng Yu
, Peide D. Ye:
Determination of Domain Wall Velocity and Nucleation Time by Switching Dynamics Studies of Ferroelectric Hafnium Zirconium Oxide. VLSI Technology and Circuits 2022: 338-339 - 2019
- [c8]Mengwei Si, Xiao Lyu, Peide D. Ye:
Modeling of Leakage-Assist-Switching in Ferroelectric/Dielectric Stack. DRC 2019: 93-95 - 2018
- [c7]Sami Alghamdi, Wonil Chung, Mengwei Si, Peide D. Ye:
Time Response of Polarization Switching in Ge Hafnium Zirconium Oxide Nanowire Ferroelectric Field-effect Transistors. DRC 2018: 1-2 - [c6]Wonil Chung, Mengwei Si, Peide D. Ye:
Alleviation of Short Channel Effects in Ge Negative Capacitance pFinFETs. DRC 2018: 1-2 - [c5]Pai-Ying Liao, Mengwei Si, Gang Qiu, Peide D. Ye:
2D Ferroelectric CuInP2S6: Synthesis, ReRAM, and FeRAM. DRC 2018: 1-2 - [c4]Jinhyun Noh, Mengwei Si, Hong Zhou, Marko J. Tadjer, Peide D. Ye:
The Impact of Substrates on the Performance of Top-Gate p-Ga203 Field-Effect Transistors: Record High Drain Current of 980 mA/mm on Diamond. DRC 2018: 1-2 - [c3]Gang Qiu, Mengwei Si, Yixiu Wang, Xiao Lyu, Wenzhuo Wu, Peide D. Ye:
High-Performance Few-Layer Tellurium CMOS Devices Enabled by Atomic Layer Deposited Dielectric Doping Technique. DRC 2018: 1-2 - [c2]Sami Alghamdi, Mengwei Si, Lingming Yang, Peide D. Ye:
Low frequency noise in MOS2 negative capacitance field-effect transistor. IRPS 2018: 1 - 2015
- [c1]Mengwei Si, SangHoon Shin, Nathan J. Conrad, Jiangjiang Gu, Jingyun Zhang, Muhammad Ashraful Alam, Peide D. Ye:
Characterization and reliability of III-V gate-all-around MOSFETs. IRPS 2015: 4
Coauthor Index
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