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Wenbo Yin
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2020 – today
- 2024
- [j6]Yunhui Qiu
, Yiqing Mao
, Xuchen Gao
, Sichao Chen
, Jiangnan Li
, Wenbo Yin
, Lingli Wang
:
FDRA: A Framework for a Dynamically Reconfigurable Accelerator Supporting Multi-Level Parallelism. ACM Trans. Reconfigurable Technol. Syst. 17(1): 4:1-4:26 (2024) - [j5]Sichao Chen
, Chang Cai
, Su Zheng
, Jiangnan Li
, Guowei Zhu
, Jingyuan Li
, Yazhou Yan
, Yuan Dai
, Wenbo Yin
, Lingli Wang
:
HierCGRA: A Novel Framework for Large-scale CGRA with Hierarchical Modeling and Automated Design Space Exploration. ACM Trans. Reconfigurable Technol. Syst. 17(2): 35:1-35:31 (2024) - [j4]Yuan Dai
, Jingyuan Li
, Qilong Zhu, Yunhui Qiu
, Yihan Hu, Wenbo Yin, Lingli Wang
:
HETA: A Heterogeneous Temporal CGRA Modeling and Design Space Exploration via Bayesian Optimization. IEEE Trans. Very Large Scale Integr. Syst. 32(3): 505-518 (2024) - [c27]Xuchen Gao, Yunhui Qiu, Yuan Dai, Wenbo Yin, Lingli Wang:
A CGRA Front-end Compiler Enabling Extraction of General Control and Dedicated Operators. ASPDAC 2024: 799-804 - [c26]Jiahang Lou, Xuchen Gao, Yiqing Mao, Yunhui Qiu, Yihan Hu, Wenbo Yin, Lingli Wang:
An Agile Deploying Approach for Large-Scale Workloads on CGRA-CPU Architecture. DATE 2024: 1-6 - [c25]Jiangnan Li, Yazhou Yan, Jingyuan Li, Shaoyang Sun, Boyin Jin, Wenbo Yin, Lingli Wang:
An Architecture-Agnostic Dataflow Mapping Framework on CGRA. IPDPS (Workshops) 2024: 618-625 - [c24]Jingyuan Li, Yuan Dai, Yihan Hu, Jiangnan Li, Wenbo Yin, Jun Tao, Lingli Wang:
TransMap: An Efficient CGRA Mapping Framework via Transformer and Deep Reinforcement Learning. IPDPS (Workshops) 2024: 626-633 - 2023
- [c23]Yuan Dai
, Yunhui Qiu, Qilong Zhu, Jingyuan Li
, Wenbo Yin, Lingli Wang:
UPTRA: An Ultra-Parameterized Temporal CGRA Modeling and Optimization. FCCM 2023: 208 - [c22]Bingbing Peng, Shaoyang Sun, Yuan Dai
, Jingyuan Li
, Yunhui Qiu, Kaihang Wang, Wenbo Yin, Lingli Wang:
PRAD: A Bayesian Optimization-based DSE Framework for Parameterized Reconfigurable Architecture Design. FCCM 2023: 226 - [c21]Jiangnan Li, Chang Cai, Yaya Zhao, Yazhou Yan, Wenbo Yin, Lingli Wang:
GRAFT: GNN-based Adaptive Framework for Efficient CGRA Mapping. ICFPT 2023: 26-34 - [c20]Yuhang Cao, Yunhui Qiu, Xuchen Gao
, Qilong Zhu, Wenbo Yin, Lingli Wang:
E2-ACE: An Energy-Efficient Reconfigurable Crypto-Accelerator with Agile End-to-End Toolchain. ICFPT 2023: 296-297 - [c19]Qilong Zhu, Yuhang Cao, Yunhui Qiu, Xuchen Gao
, Wenbo Yin, Lingli Wang:
A Dynamic Partial Reconfigurable CGRA Framework for Multi-Kernel Applications. ICFPT 2023: 298-299 - [c18]Jingyuan Li
, Yunhui Qiu, Guowei Zhu, Qilong Zhu, Wenbo Yin, Lingli Wang:
THRAM: A Template-based Heterogeneous CGRA Modeling Framework Supporting Fast DSE. ISCAS 2023: 1-5 - [c17]Mingtong Huang, Junxiang Ren, Lang Liu, Ruilin Song, Wenbo Yin:
CPIC at SemEval-2023 Task 7: GPT2-Based Model for Multi-evidence Natural Language Inference for Clinical Trial Data. SemEval@ACL 2023: 397-401 - 2022
- [j3]Yunhui Qiu
, Wenbo Yin, Lingli Wang
:
A High-Performance and Scalable NVMe Controller Featuring Hardware Acceleration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(5): 1344-1357 (2022) - [c16]Yunhui Qiu, Yuhang Cao, Yuan Dai
, Wenbo Yin, Lingli Wang:
TRAM: An Open-Source Template-based Reconfigurable Architecture Modeling Framework. FPL 2022: 61-69 - [c15]Wenbo Yin, Junxiang Ren, Yuejiao Wu, Ruilin Song, Lang Liu, Zhen Cheng, Sibo Wang:
Knowledge Enhanced Pre-trained Language Model for Product Summarization. NLPCC (2) 2022: 263-273 - 2021
- [c14]Yunhui Qiu, Wenbo Yin, Lingli Wang:
A High-performance Open-channel Open-way NAND Flash Controller Architecture. FPL 2021: 91-98 - [c13]Su Zheng, Kaisen Zhang, Yaoguang Tian, Wenbo Yin, Lingli Wang, Xuegong Zhou:
FastCGRA: A Modeling, Evaluation, and Exploration Platform for Large-Scale Coarse-Grained Reconfigurable Arrays. FPT 2021: 1-10 - 2020
- [j2]Yunhui Qiu
, Jinyu Xie, Hankun Lv, Wenbo Yin, Wai-Shing Luk, Lingli Wang
, Bowei Yu, Hua Chen, Xianjun Ge, Zhijian Liao, Xiaozhong Shi:
FULL-KV: Flexible and Ultra-Low-Latency In-Memory Key-Value Store System Design on CPU-FPGA. IEEE Trans. Parallel Distributed Syst. 31(8): 1828-1444 (2020) - [c12]Hankun Lv, Yuchen Ren, Yunhui Qiu, Wenbo Yin, Lingli Wang:
High Throughput and Low Latency Multi-Version Management Key-Value Storage Accelerator. FPT 2020: 290-291 - [c11]Jinyu Xie, Wenbo Yin, Lingli Wang:
Achieving Flexible, Low-Latency and 100Gbps Line-rate Load Balancing over Ethernet on FPGA. SoCC 2020: 201-206
2010 – 2019
- 2019
- [j1]Joseph Wei
, Wenbo Yin:
Empowering Female Entrepreneurs at the 2018 WIE ILC Start-Up Pitch Competition [Society News]. IEEE Consumer Electron. Mag. 8(1): 7-8 (2019) - [c10]Yuchen Ren, Zhijian Liao, Xiaozhong Shi, Jinyu Xie, Yunhui Qiu, Hankun Lv, Wenbo Yin, Lingli Wang, Bowei Yu, Hua Chen, Xianjun He:
A Low-Latency Multi-Version Key-Value Store Using B-Tree on an FPGA-CPU Platform. FPL 2019: 321-325 - [c9]Jinyu Xie, Yunhui Qiu, Wenbo Yin, Lingli Wang:
High-Throughput and Low-Latency Distributed Management Proxy for Key-Value Store Over 100Gbps Ethernet on FPGA. FPT 2019: 224-230 - 2018
- [c8]Yunhui Qiu, Hankun Lv, Jinyu Xie, Wenbo Yin, Lingli Wang:
Ultra-Low-Latency and Flexible In-memory Key-Value Store System Design on CPU-FPGA. FPT 2018: 142-149 - [c7]Li Ding, Wenbo Yin, Lingli Wang:
Ultra-Low Latency and High Throughput Key-Value Store Systems Over Ethernet. ISCAS 2018: 1-5 - 2017
- [c6]Li Ding, Wenbo Yin:
A fully-pipelined hash table achieving low-latency and high throughput key-value retrieving system. ASICON 2017: 331-334 - [c5]Kaixuan Zhang, Li Ding, Yujie Cai, Wenbo Yin, Fan Yang, Jun Tao, Lingli Wang:
A high performance real-time edge detection system with NEON. ASICON 2017: 847-850 - [c4]Jin Qiu, Ping Kang, Li Ding, Yipeng Yuan, Wenbo Yin, Lingli Wang:
FPGA acceleration of the scoring process of X!TANDEM for protein identification. FPL 2017: 1-4 - 2016
- [c3]Wei Liang, Wenbo Yin, Ping Kang, Lingli Wang:
Memory efficient and high performance key-value store on FPGA using Cuckoo hashing. FPL 2016: 1-4 - [c2]Li Ding, Ping Kang, Wenbo Yin, Linli Wang:
Hardware TCP Offload Engine based on 10-Gbps Ethernet for low-latency network communication. FPT 2016: 269-272 - 2014
- [c1]Jiasen Huang, Junyan Ren, Wenbo Yin, Lingli Wang:
No zero padded sparse matrix-vector multiplication on FPGAs. FPT 2014: 290-291 - [e1]Jialin Chen, Wenbo Yin, Yuichiro Shibata, Lingli Wang, Hayden Kwok-Hay So, Yuchun Ma:
2014 International Conference on Field-Programmable Technology, FPT 2014, Shanghai, China, December 10-12, 2014. IEEE 2014, ISBN 978-1-4799-6245-7 [contents]
Coauthor Index
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last updated on 2024-08-23 19:27 CEST by the dblp team
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