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Journal Articles
- 2020
[j7]Michael J. Risbeck
, Christos T. Maravelias, James B. Rawlings, Robert D. Turney:
Mixed-integer optimization methods for online scheduling in large-scale HVAC systems. Optim. Lett. 14(4): 889-924 (2020)- 2018
- [j6]James B. Rawlings, Nishith R. Patel, Michael J. Risbeck, Christos T. Maravelias, Michael J. Wenzel, Robert D. Turney:
Economic MPC and real-time decision making with application to large-scale HVAC energy systems. Comput. Chem. Eng. 114: 89-98 (2018) - 2009
- [j5]Yifeng Qiu, Wael M. Badawy, Robert D. Turney:
An Architecture for Programmable Multi-core IP Accelerated Platform with an Advanced Application of H.264 Codec Implementation. J. Signal Process. Syst. 57(2): 123-137 (2009) - 2007
- [j4]Kristof Denolf, Adrian Chirila-Rus, Paul R. Schumacher, Robert D. Turney, Kees A. Vissers, Diederik Verkest, Henk Corporaal:
A Systematic Approach to Design Low-Power Video Codec Cores. EURASIP J. Embed. Syst. 2007 (2007) - [j3]Ihab Amer, Wael M. Badawy, Graham A. Jullien, Marco Mattavelli, Robert D. Turney:
A Simplified 8 × 8 Transformation and Quantization Real-Time IP-Block for MPEG-4 H.264/AVC Applications: a New Design Flow Approach. J. Circuits Syst. Comput. 16(6): 1011-1026 (2007) - 2005
- [j2]T. Chiang, Marco Mattavelli, Robert D. Turney:
Introduction to the Special Issue on Integrated Multimedia Platforms. IEEE Trans. Circuits Syst. Video Technol. 15(5): 589-592 (2005) - [j1]Kristof Denolf, Christophe De Vleeschouwer, Robert D. Turney, Gauthier Lafruit, Jan Bormans:
Memory Centric Design of an MPEG-4 Video Encoder. IEEE Trans. Circuits Syst. Video Technol. 15(5): 609-619 (2005)
Conference and Workshop Papers
- 2016
- [c10]Nishith R. Patel, Michael J. Risbeck, James B. Rawlings, Michael J. Wenzel, Robert D. Turney:
Distributed economic model predictive control for large-scale building temperature regulation. ACC 2016: 895-900 - 2015
- [c9]Michael J. Risbeck, Christos T. Maravelias, James B. Rawlings, Robert D. Turney:
Cost optimization of combined building heating/cooling equipment via mixed-integer linear programming. ACC 2015: 1689-1694 - 2007
- [c8]Yifeng Qiu, Wael M. Badawy, Robert D. Turney:
A Prototyping Co-design Platform with A Simplified Architecture for Video Codec Implementation. ISCAS 2007: 1220-1224 - 2005
- [c7]Kristof Denolf, Adrian Chirila-Rus, Robert D. Turney, Paul R. Schumacher, Kees A. Vissers:
Memory Efficient Design of an MPEG-4 Video Encoder for FPGAs. FPL 2005: 391-396 - [c6]Paul R. Schumacher, Kristof Denolf, Adrian Chirila-Rus, Robert D. Turney, Nick Fedele, Kees A. Vissers, Jan Bormans:
A scalable, multi-stream MPEG-4 video decoder for conferencing and surveillance applications. ICIP (2) 2005: 886-889 - [c5]Paul R. Schumacher, Marco Mattavelli, Adrian Chirila-Rus, Robert D. Turney:
A Virtual Socket Framework for Rapid Emulation of Video and Multimedia Designs. ICME 2005: 872-875 - [c4]Paul R. Schumacher, Marco Mattavelli, Adrian Chirila-Rus, Robert D. Turney:
A Software/Hardware Platform for Rapid Prototyping of Video and Multimedia Designs. IWSOC 2005: 30-33 - 2003
- [c3]Massimo Ravasi, Marco Mattavelli, Paul R. Schumacher, Robert D. Turney:
High-Level Algorithmic Complexity Analysis for the Implementation of a Motion-JPEG2000 Encoder. PATMOS 2003: 440-450 - 1999
- [c2]Justin G. R. Delva, Ali M. Reza, Robert D. Turney:
FPGA implementation of a nonlinear two dimensional fuzzy filter. ICASSP 1999: 2143-2146 - [c1]Robert D. Turney, Ali M. Reza, Justin G. R. Delva:
FPGA implementation of adaptive temporal Kalman filter for real time video filtering. ICASSP 1999: 2231-2234
Coauthor Index
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