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ORCIDNavneet Gupta
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2020 – today
- 2021
[j5]Vinay Chamola, Pavan Kotesh, Aayush Agarwal, Naren Naren, Navneet Gupta, Mohsen Guizani
:
A Comprehensive Review of Unmanned Aerial Vehicle Attacks and Neutralization Techniques. Ad Hoc Networks 111: 102324 (2021)- [j4]Plamen I. Dankov, Praveen K. Sharma, Navneet Gupta:
Numerical and Experimental Investigation of the Opposite Influence of Dielectric Anisotropy and Substrate Bending on Planar Radiators and Sensors. Sensors 21(1): 16 (2021) - [c16]Navneet Gupta, Hitesh Shrimali, Adam Makosiej, Andrei Vladimirescu, Amara Amara:
Energy Efficient Comparator-Less Current-Mode TFET-CMOS Co-Integrated Scalable Flash ADC. MWSCAS 2021: 297-300 - [i1]Yuvraj Singh Malhi, Navneet Gupta:
Comparison of Neural Network based Soft Computing Techniques for Electromagnetic Modeling of a Microstrip Patch Antenna. CoRR abs/2109.10065 (2021) - 2020
- [j3]B. Dinesh Kumar, Sumit K. Pandey, Navneet Gupta, Hitesh Shrimali:
Design of hybrid flash-SAR ADC using an inverter based comparator in 28 nm CMOS. Microelectron. J. 95 (2020) - [c15]Markus Hiienkari, Navneet Gupta, Jukka Teittinen, Jesse Simonsson, Matthew J. Turnquist, Jonas Eriksson, Risto Anttila, Ohto Myllynen, Hannu Rämäkkö, Sofia Mäkikyrö, Lauri Koskinen:
A 0.4-0.9V, 2.87pJ/cycle Near-Threshold ARM Cortex-M3 CPU with In-Situ Monitoring and Adaptive-Logic Scan. COOL CHIPS 2020: 1-3
2010 – 2019
- 2019
- [c14]B. Dinesh Kumar, Hitesh Shrimali, Navneet Gupta:
A 6-Bit, 29.56 fJ/Conv-Step, Voltage Scalable Flash-SAR Hybrid ADC in 28 nm CMOS. ISCAS 2019: 1-5 - [c13]Vijender Kumar Sharma, B. Dinesh Kumar, Muhammed Suhail Illikkal, Jai Narayan Tripathi, Navneet Gupta, Hitesh Shrimali:
Analysis of Timing Error Due to Supply and Substrate Noise in an Inverter Based High-Speed Comparator. ISCAS 2019: 1-5 - 2018
- [d1]Navneet Gupta, Adam Makosiej, Amara Amara, Andrei Vladimirescu, Costin Anghel:
Related references for extended TED submission (uDRAM and uSRAM reference papers). IEEE DataPort, 2018
- 2017
- [c12]Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel:
Tunnel FET based refresh-free-DRAM. DATE 2017: 914-917 - [c11]Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel:
1.56GHz/0.9V energy-efficient reconfigurable CAM/SRAM using 6T-CMOS bitcell. ESSCIRC 2017: 316-319 - [c10]Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel:
Tunnel FET based ultra-low-leakage compact 2T1C SRAM. ISQED 2017: 71-75 - 2016
- [c9]Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel:
3T-TFET bitcell based TFET-CMOS hybrid SRAM design for Ultra-Low Power applications. DATE 2016: 361-366 - [c8]Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel:
16Kb hybrid TFET/CMOS reconfigurable CAM/SRAM array based on 9T-TFET bitcell. ESSDERC 2016: 356-359 - [c7]Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel:
Ultra-compact SRAM design using TFETs for low power low voltage applications. ISCAS 2016: 594-597 - [c6]Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel:
Ultra-Low-Power compact TFET Flip-Flop design for high-performance low-voltage applications. ISQED 2016: 107-112 - [c5]Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Sorin Cotofana, Costin Anghel:
TFET NDR skewed inverter based sensing method. NANOARCH 2016: 13-14 - 2015
- [j2]Jitendra Kumar, Navneet Gupta:
Bandwidth and Gain Enhancement Technique for Gammadion Cross Dielectric Resonator Antenna. Wirel. Pers. Commun. 85(4): 2309-2317 (2015) - [c4]Navneet Gupta, Adam Makosiej, Oliver Thomas, Amara Amara, Andrei Vladimirescu, Costin Anghel:
Ultra-low leakage sub-32nm TFET/CMOS hybrid 32kb pseudo DualPort scratchpad with GHz speed for embedded applications. ISCAS 2015: 597-600 - [c3]Andrei Vladimirescu, Costin Anghel, Amara Amara, Navneet Gupta, Adam Makosiej:
Sub-picowatt retention mode TFET memory for CMOS sensor processing nodes. IWASI 2015: 266-270 - [c2]Amara Amara, Navneet Gupta, Khaja Ahmad Shaik, Costin Anghel, Kiyoo Itoh:
Energy efficiency optimization for digital applications in 28nm UTBB FDSOI technology. MIXDES 2015: 23 - 2014
- [j1]Jitendra Kumar, Navneet Gupta:
Performance Analysis of Dielectric Resonator Antennas. Wirel. Pers. Commun. 75(2): 1029-1049 (2014) - 2013
- [c1]Prashant Dubey, Atul Kumar Kashyap, Navneet Gupta, Kaushik Saha:
PODIA: Power Optimization through Differential Imbalanced Amplifier. VLSI Design 2013: 125-129
Coauthor Index
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