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2010 – 2019
- 2014
[j2]Nan-Chun Lien, Li-Wei Chu, Chien-Hen Chen, Hao-I Yang, Ming-Hsien Tu, Paul-Sen Kan, Yong-Jyun Hu, Ching-Te Chuang, Shyh-Jye Jou, Wei Hwang:
A 40 nm 512 kb Cross-Point 8 T Pipeline SRAM With Binary Word-Line Boosting Control, Ripple Bit-Line and Adaptive Data-Aware Write-Assist. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(12): 3416-3425 (2014)- [c5]Li-Wei Chu, Chun-Yu Lin
, Ming-Dou Ker, Ming-Hsiang Song, Jeng-Chou Tseng, Chewnpu Jou, Ming-Hsien Tsai:
ESD protection design for wideband RF applications in 65-nm CMOS process. ISCAS 2014: 1480-1483 - 2013
- [c4]Wei-Nan Liao, Nan-Chun Lien, Chi-Shin Chang, Li-Wei Chu, Hao-I Yang, Ching-Te Chuang, Shyh-Jye Jou, Wei Hwang, Ming-Hsien Tu, Huan-Shun Huang, Jian-Hao Wang, Paul-Sen Kan, Yong-Jyun Hu:
A 40nm 1.0Mb 6T pipeline SRAM with digital-based Bit-Line Under-Drive, Three-Step-Up Word-Line, Adaptive Data-Aware Write-Assist with VCS tracking and Adaptive Voltage Detector for boosting control. SoCC 2013: 110-115 - 2012
- [c3]Shiang-Yu Tsai, Chun-Yu Lin, Li-Wei Chu, Ming-Dou Ker:
Design of ESD protection for RF CMOS power amplifier with inductor in matching network. APCCAS 2012: 467-470 - [c2]Li-Wei Chu, Chun-Yu Lin, Shiang-Yu Tsai, Ming-Dou Ker, Ming-Hsiang Song, Chewnpu Jou, Tse-Hua Lu, Jeng-Chou Tseng, Ming-Hsien Tsai, Tsun-Lai Hsu, Ping-Fang Hung, Tzu-Heng Chang:
Compact and low-loss ESD protection design for V-band RF applications in a 65-nm CMOS technology. ISCAS 2012: 2127-2130 - 2011
- [j1]Chun-Yu Lin, Li-Wei Chu, Ming-Dou Ker:
Design and implementation of configurable ESD protection cell for 60-GHz RF circuits in a 65-nm CMOS process. Microelectron. Reliab. 51(8): 1315-1324 (2011) - [c1]Chun-Yu Lin, Li-Wei Chu, Shiang-Yu Tsai, Ming-Dou Ker, Tse-Hua Lu, Tsun-Lai Hsu, Ping-Fang Hung, Ming-Hsiang Song, Jeng-Chou Tseng, Tzu-Heng Chang, Ming-Hsien Tsai:
Modified LC-tank ESD protection design for 60-GHz RF applications. ECCTD 2011: 57-60
Coauthor Index
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