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2020 – today
- 2023
[c14]Wen-June Wang, Xiang-Yin Dai, Chun-Yuan Cheng, Shang-Ming Ciou:
Drone-Based Inspection of the Appearance Defects for a Large Object. ICSSE 2023: 1-5
2010 – 2019
- 2015
- [j11]Pei-Jun Lee, Hsu-Hsien Huang, Chun-Yuan Cheng:
Fast Motion Estimation Based on Perceptual-Aware for the Depth Map Coding in 3DVC. J. Inf. Sci. Eng. 31(5): 1521-1536 (2015) - [j10]Jinn-Shyan Wang, Chun-Yuan Cheng, Pei-Yuan Chou, Tzu-Yi Yang:
A Wide-Range, Low-Power, All-Digital Delay-Locked Loop With Cyclic Half-Delay-Line Architecture. IEEE J. Solid State Circuits 50(11): 2635-2644 (2015) - [j9]Jinn-Shyan Wang, Chun-Yuan Cheng:
An All-Digital Delay-Locked Loop Using an In-Time Phase Maintenance Scheme for Low-Jitter Gigahertz Operations. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(2): 395-404 (2015) - 2014
- [c13]Chun-Yuan Cheng, Jinn-Shyan Wang, Pei-Yuan Chou, Shiou-Ching Chen, Chi-Tien Sun, Yuan-Hua Chu, Tzu-Yi Yang:
A 3 MHz-to-1.8 GHz 94 μW-to-9.5 mW 0.0153-mm2 all-digital delay-locked loop in 65-nm CMOS. A-SSCC 2014: 361-364 - [c12]Chun-Yuan Cheng, Jr-Tzung Chen, Te-Hsiu Sun, Mei-Ling Liu:
A Modified Preventive Maintenance Model with Degradation Rate Reduction in a Finite Time Span. ICINCO (2) 2014: 746-750 - 2012
- [j8]Yu-Ting Hsiao, Chun-Yuan Cheng, Cheng-Hung Li, Yu-Zheng Wang, Hsiang-An Wang:
Annotating photographs of places of interest in Taiwan - a multifaceted photo summarisation method based on TELDAP. Int. J. Humanit. Arts Comput. 6(1-2): 8-21 (2012) - [j7]Chun-Yuan Cheng, Jinn-Shyan Wang, Cheng-Tai Yeh:
An ultra Low-voltage/Power-Efficient All-Digital Delay Locked Loop in 55 nm CMOS Technology. J. Circuits Syst. Comput. 21(8) (2012) - [c11]Chun-Yuan Cheng, Jinn-Shyan Wang, Cheng-Tai Yeh, Jenn-Shyan Sheu:
Design of a 2.5-GHz, 3-ps jitter, 8-locking-cycle, all-digital delay-locked loop with cycle-by-cycle phase adjustment. VLSIC 2012: 186-187 - 2011
- [j6]Chun-Yuan Cheng:
The Near-Optimal Preventive Maintenance Policies for a Repairable System with a Finite Life Time by Using Simulation Methods. J. Comput. 6(3): 548-555 (2011) - [c10]Jinn-Shyan Wang, Yung-Chen Chien, Jia-Hong Lin, Chun-Yuan Cheng, Ying-Ting Ma, Chung-Hsun Huang:
ADDLL/VDD-biasing co-design for process characterization, performance calibration, and clock synchronization in variation-tolerant designs. ASICON 2011: 47-50 - [c9]Te-Hsiu Sun, Chun-Yuan Cheng, Fang-Chih Tien:
Roundness measurement using the PSO algorithm. ICNC 2011: 1202-1206 - [c8]Chun-Yuan Cheng, Min Wang, Bee Leng Lee:
The impacts of common cause failures for two-unit parallel systems from RAMS+C point of view. IEEM 2011: 1256-1260 - [c7]Chun-Yuan Cheng, Yu-Chun Wang, Richard Tzong-Han Tsai:
IISR Crosslink Approach at NTCIR 9 CLLD Task. NTCIR 2011 - 2010
- [j5]Jinn-Shyan Wang, Chun-Yuan Cheng, Je-Ching Liu, Yu-Chia Liu, Yi-Ming Wang:
A Duty-Cycle-Distortion-Tolerant Half-Delay-Line Low-Power Fast-Lock-in All-Digital Delay-Locked Loop. IEEE J. Solid State Circuits 45(5): 1036-1047 (2010) - [c6]Jinn-Shyan Wang, Chun-Yuan Cheng, Je-Ching Liu, Yu-Chia Liu, Yi-Ming Wang:
A 55nm 1GHz one-cycle-locking de-skewing circuit. ISCAS 2010: 1755-1758
2000 – 2009
- 2009
- [c5]Chun-Yuan Cheng, Renkuan G. Guo, Mei-Ling Liu:
Random Variates Generating Methods of Time-between-failures for the Repairable Systems under Age-reduction Preventive Maintenance. ICINCO-RA 2009: 325-330 - 2008
- [j4]Chun-Yuan Cheng, Mingchih Chen:
The Periodic Maintenance Policy for a Weibull Life-Time System with Degradation Rate Reduction under Reliability Limit. Asia Pac. J. Oper. Res. 25(6): 793-805 (2008) - 2007
- [c4]Chun-Yuan Cheng, Chih-Chung Lo, Chien-Yu Chiang, Fang-Chih Tien:
Applying Particle Swarm Optimization algorithm to roundness measurement. SMC 2007: 2766-2770 - 2006
- [c3]Jinn-Shyan Wang, Yi-Ming Wang, Chun-Yuan Cheng, Yu-Chia Liu:
An improved SAR controller for DLL applications. ISCAS 2006 - [c2]Renkuan G. Guo, Chun-Yuan Cheng, Yanhong Cui:
L1-Normed GM(1, 1) Models and Reliability Analysis. SMC 2006: 775-779 - 2005
- [j3]Ching-Fang Liaw, Chun-Yuan Cheng, Mingchih Chen:
Scheduling two-machine no-wait open shops to minimize makespan. Comput. Oper. Res. 32: 901-917 (2005) - 2003
- [j2]Ching-Fang Liaw, Yang-Kuei Lin, Chun-Yuan Cheng, Mingchih Chen:
Scheduling unrelated parallel machines to minimize total weighted tardiness. Comput. Oper. Res. 30(12): 1777-1789 (2003) - 2002
- [j1]Ching-Fang Liaw, Chun-Yuan Cheng, Mingchih Chen:
The total completion time open shop scheduling problem with a given sequence of jobs on one machine. Comput. Oper. Res. 29(9): 1251-1266 (2002)
1990 – 1999
- 1994
- [c1]Edward F. Mykytka, Chun-Yuan Cheng:
Generating correlated random variates based on an analogy between correlation and force. WSC 1994: 1413-1416
Coauthor Index
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